Semiconductor Contact Plug Fabrication with Damaged Layer Removal
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Solution Overview
Problem
As semiconductor industry scales down to 10 nm node generation, contact area of contact plugs decreases significantly, leading to resistance increase and damaged regions in adjacent dielectric layers during contact hole formation, affecting device operation.
Innovation Solution
A method involving forming a substrate with a dielectric layer, creating openings, depositing a dielectric protective layer, and filling with a metal layer, followed by etching processes to remove damaged layers and dielectric protective layers, forming voids with specific surface profiles to address the issue of damaged layers in dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If contact area of contact plugs is decreased to scale down to 10 nm node generation, then device integration density is improved, but resistance increases and damaged regions are formed in adjacent dielectric layers
Solution Approach 1:
The patent extracts and removes the damaged layer from the dielectric layer adjacent to the contact hole. By selectively removing the damaged region through a multi-step etching process that includes forming a protective layer, filling with metal, and then etching back to remove both the damaged dielectric and protective layer, the harmful damaged regions are extracted from the structure, improving device reliability while maintaining small contact dimensions
Solution Approach 2:
The patent applies preliminary action by forming a protective layer in the contact hole before filling it with metal. This protective layer is subsequently used as an etch stop layer during the damaged layer removal process. The preliminary formation of this protective structure enables controlled removal of damaged dielectric material while preventing damage to underlying structures
2Ease of manufacture
If conventional contact hole formation is used, then manufacturing process is simple, but damaged regions remain in adjacent dielectric layer affecting device operation
Solution Approach 1:
The patent segments the contact hole filling process into distinct stages: first forming a protective layer, then filling with metal, and finally performing selective etching to remove the damaged dielectric layer. This segmentation allows each step to be optimized independently - the protective layer serves both as a structural element during filling and as an etch stop layer during damaged layer removal, making the overall process manageable despite the additional steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces resistance and improves device operation by removing damaged layers and forming voids with controlled surface profiles, enhancing the semiconductor device's performance and reliability.
Implementation Method 1
the damaged layer and the dielectric protective layer are removed
Data Source
AI summary
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a stop layer between the dielectric layer and the substrate, wherein the stop layer contacts the substrate directly and the dielectric layer covers the top surface of the stop layer; forming an opening in the dielectric layer, wherein the dielectric layer comprises a damaged layer adjacent to the opening; forming a dielectric protective layer in the opening; forming a metal layer in the opening; removing the damaged layer and the dielectric protective layer to form a void, wherein the void exposes a top surface of the substrate; and forming a cap layer on and covering the dielectric layer, the void, and the metal layer.