Semiconductor Contact Plug Protection via Segmented Insulating Layers

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Solution Overview

Problem

The existing manufacturing procedure for semiconductor devices, such as DRAM, often damages storage-node contact plugs during the formation of wiring layers due to non-uniform etching conditions, which also reduces the thickness of insulating films covering bit lines, leading to a reduced margin between bit lines and silicon oxide films.

Innovation Solution

The semiconductor device incorporates a structure with a first insulating layer, side and upper surfaces of contact plugs surrounded by this layer, a second insulating layer covering the wiring layer, and a third insulating layer covering the upper surfaces of the wiring, preventing damage to contact plugs during the formation of conductive layers by ensuring uniform coverage and protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single interlayer insulating film is used to cover bit lines and contact plugs, then the manufacturing process is simple, but the contact plugs are damaged during wiring formation due to non-uniform etching conditions

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidcontact plug integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The single interlayer insulating film is divided into two separate films: a first interlayer insulating film covering the bit lines, and a second interlayer insulating film covering the contact plugs. This segmentation allows independent optimization of each film's thickness and etching resistance, preventing contact plug damage during wiring formation while maintaining manufacturing feasibility through sequential formation processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device receive different insulating film configurations: the first interlayer insulating film is formed with sufficient thickness to prevent etching damage to bit lines, while the second interlayer insulating film is specifically positioned to protect contact plugs. This local differentiation ensures that each critical component receives appropriate protection tailored to its specific vulnerability.

Inventive Principle:
Principle #3Local quality

2Productivity

If the insulating film thickness is reduced to allow wiring formation, then the manufacturing process is faster, but the margin between bit lines and silicon oxide film is reduced

Engineering Contradiction:
Improvewiring formation speedVSAvoidshort margin between bit lines and silicon oxide film
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The first interlayer insulating film is formed beforehand with sufficient thickness to establish an adequate safety margin between bit lines and the silicon oxide film before wiring formation begins. This preliminary action ensures that even if subsequent processing removes some material, the critical margin is maintained, allowing wiring formation to proceed without compromising device reliability.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If uniform etching conditions are applied across the entire surface, then the manufacturing process is straightforward, but non-uniformity causes contact plug damage in certain areas

Engineering Contradiction:
Improveetching process simplicityVSAvoidcontact plug dimensional accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The etching process is segmented into two independent steps: first etching the wiring pattern through the first interlayer insulating film, then etching contact hole patterns through the second interlayer insulating film. This segmentation allows each etching operation to be optimized for its specific purpose, with the second etching step starting from a fresh, uniform surface that ensures consistent contact plug dimensions across the entire wafer.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10355075B2Semiconductor devices including insulative materials extending between conductive structures
Publication Date: 2019.07.16 MICRON TECHNOLOGY INC
  • US10355075B2 patent drawing
  • US10355075B2 patent drawing
  • US10355075B2 patent drawing

AI summary

Disclosed herein is a device that includes: a semiconductor substrate; a first insulating layer over a surface of the semiconductor substrate; first and second contact plugs each including side and upper surfaces, the side surfaces of the first and second contact plugs being surrounded by the first insulating film, the upper surfaces of the first and second contact plugs being substantially on the same plane with an upper surface of the first insulating layer; a second insulating layer over the first insulating layer; a first conductive layer including a bottom portion on the first contact plug and a side portion surrounded by the second insulating layer; a third insulating layer over the first conductive layer; and a second conductive layer on the second contact plug, a part of a side surface of the second conductive layer being surrounded by both the second and third insulating layers.