Semiconductor Contact Plug Structure for Low-Capacitance Stability
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Solution Overview
Problem
As semiconductor devices scale down, there is a need to decrease capacitance and ensure electrical stability between contacts, which existing multi-gate transistors struggle to achieve effectively.
Innovation Solution
The semiconductor device incorporates a structure with a lower and upper conductive pattern connected by a plug pattern featuring a molybdenum and tungsten metal pattern, where the tungsten layer is deposited using different deposition methods and polished to form a reliable contact, and a gate structure with a capping pattern and source/drain contacts that penetrate the gate capping to enhance electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pitch of the semiconductor device is decreased to increase density, then device density is improved, but capacitance between contacts increases and electrical stability deteriorates
Solution Approach 1:
The patent transitions from a conventional planar contact structure to a three-dimensional contact structure by forming a plug pattern that extends vertically through multiple conductive layers. This dimensional change allows contacts to be positioned at different heights (first contact at first height, second contact at second height), thereby maintaining electrical stability and controlling capacitance even as the device pitch is reduced to increase density.
Solution Approach 2:
The contact structure is segmented into multiple distinct conductive components: a first conductive pattern at a first height, a second conductive pattern at a second height, and intermediate conductive patterns connecting them. This segmentation allows independent optimization of each contact's position and function, enabling control of capacitance and electrical stability while maintaining high device density through vertical stacking.
2Reliability
If multi-gate transistor structure is used to improve current control capability, then current control is improved, but device complexity increases
Solution Approach 1:
The gate structure is designed to perform multiple functions simultaneously: it provides the primary function of controlling current flow through the channel, while also serving as a platform for forming the complex multi-layer conductive patterns and plugs above it. The gate electrode and gate capping pattern together create a universal structure that supports both the control function and the intricate contact architecture, thereby managing device complexity while maintaining superior current control capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves element performance and reliability by reducing capacitance and stabilizing electrical connections, enabling better control and stability in scaled-down semiconductor devices.
Implementation Method 1
a first tungsten pattern disposed on the first molybdenum pattern, wherein the first tungsten pattern is formed by a physical vapor deposition method
Data Source
AI summary
There is provided a semiconductor device capable of capable of improving element performance and reliability. A semiconductor device includes a lower conductive pattern disposed on a substrate, an upper conductive pattern disposed on the lower conductive pattern, and a first plug pattern disposed between the lower conductive pattern and the upper conductive pattern and connected to the lower conductive pattern and the upper conductive pattern. The first plug pattern includes a first barrier pattern that defines a first plug recess and a first plug metal pattern that fills the first plug recess, and the first plug metal pattern includes a first molybdenum pattern and a first tungsten pattern disposed on the first molybdenum pattern.