Semiconductor Contact Plug Uniformity via Segmented Sidewall Templates
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in achieving uniformity in pattern formation, particularly in the sizes and thicknesses of contact holes and sidewall patterns, which affects the accuracy and stability of semiconductor devices.
Innovation Solution
The semiconductor device design includes contact plug patterns with multiple contact holes of varying sizes and sidewall patterns of different thicknesses, where the electrode patterns are conformably formed inside the sidewall patterns with size errors less than 10%, ensuring uniformity and accurate filling of the contact holes with filling patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography and etching techniques are used to form contact holes, then the manufacturing process is simple, but the pattern uniformity and size precision deteriorate
Solution Approach 1:
The contact hole formation process is segmented into multiple stages: forming mandrels with initial sizes, depositing sidewall patterns with specific thicknesses, and creating electrode patterns within defined spaces. This segmentation allows each stage to be optimized independently, achieving uniform contact holes with sizes controlled to within 10% variation despite varying initial mandrel sizes.
Solution Approach 2:
Sidewall patterns are introduced as intermediary structures between the mandrels and final contact holes. These sidewall patterns act as templates that define the final contact hole dimensions, decoupling the final size from the initial mandrel size and enabling precise size control through the sidewall pattern thickness rather than direct etching.
2Manufacturing precision
If contact holes of different sizes are formed directly, then the design flexibility is improved, but the electrode pattern uniformity deteriorates
Solution Approach 1:
The patent applies local quality by forming sidewall patterns with different thicknesses on different mandrels. Each sidewall pattern thickness is locally optimized to achieve uniform electrode pattern sizes despite varying mandrel sizes. For example, thinner sidewall patterns are formed on larger mandrels and thicker sidewall patterns on smaller mandrels, ensuring all electrode patterns have comparable dimensions.
Solution Approach 2:
The patent changes the parameter of sidewall pattern thickness to compensate for variations in mandrel size. By adjusting the sidewall pattern thickness parameter locally for each mandrel, the final contact hole sizes and electrode pattern sizes are uniformized, transforming the relationship between initial and final dimensions.
3Reliability
If size errors in electrode patterns are not controlled, then the manufacturing process is simpler, but the device reliability deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the sidewall pattern thickness is determined based on the mandrel size, and the electrode pattern formation is guided by the sidewall pattern dimensions. This feedback loop ensures that size errors are controlled at each stage, with the sidewall patterns serving as reference structures that define the final contact hole and electrode pattern dimensions within 10% tolerance.
Data Source
AI summary
A semiconductor device, a semiconductor module, an electronic apparatus and methods of fabricating and manufacturing the same are provided. The semiconductor device includes a lower interconnection formed on a substrate, a plurality of control patterns formed on the lower interconnection, a plurality of lower contact plug patterns formed on the control patterns, a plurality of storage patterns formed on the lower contact plug patterns, a plurality of upper electrodes formed on the storage patterns, and a plurality of upper interconnections formed on the upper electrodes. The lower contact plug patterns each include at least two contact holes having different sizes, a plurality of sidewall patterns formed on inner sidewalls of the two contact holes and wherein the sidewall patterns have different thicknesses from one another. The semiconductor device further includes a plurality of electrode patterns conformably formed on the inside of the sidewall patterns and having size errors less than 10%, and a plurality of filling patterns formed inside the electrode patterns and completely filling the inside of the contact holes.