Semiconductor Contact via Sequential Recess Etching
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Solution Overview
Problem
In semiconductor fabrication, existing methods for connecting conductive layers often result in non-uniform interfaces, leading to higher resistance, capacitance, and RC delay due to uneven surfaces and etching processes.
Innovation Solution
A method involving the sequential formation of recesses in dielectric and conductive layers, with each layer being formed in a recess defined by the sidewalls of the previous layer, ensuring uniform surfaces and interfaces, and using etching processes with controlled variables to maintain planarity and uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to connect conductive layers, then the layers can be connected, but non-uniform interfaces are created leading to higher resistance, capacitance, and RC delay
Solution Approach 1:
The patent applies preliminary action by forming a mandrel structure and depositing metal layers before creating the final contact holes. This sequence allows the interface between conductive layers to be established on a uniform, pre-prepared surface rather than attempting to create uniformity during the etching process itself, thereby reducing RC delay and improving signal speed
Solution Approach 2:
The patent introduces an additional dimensional element by creating a protruding metal layer that extends beyond the contact hole opening. This dimensional extension provides a larger uniform interface area for electrical connection, compensating for the limitations of conventional vertical etching approaches and reducing contact resistance
2Reliability
If conventional metal contact formation is used, then conductive layers are connected, but the risk of feature dislodgment increases during subsequent processes
Solution Approach 1:
The patent applies beforehand cushioning by creating an oversized metal protrusion that extends beyond the contact hole opening. This excess metal acts as a cushion or buffer that prevents dislodgment of the contact feature during subsequent fabrication processes, while the protruding structure also provides mechanical reinforcement to the otherwise vulnerable vertical contact hole
Solution Approach 2:
The patent changes the geometric parameters of the metal contact structure by controlling the metal layer thickness to be greater than the contact hole depth, creating a protruding structure. This parameter change transforms the contact from a simple fill operation to a controlled protrusion that provides both electrical connection and mechanical stability
3Manufacturing precision
If non-uniform surfaces are present during layer formation, then fabrication can proceed, but resistance and capacitance increase
Solution Approach 1:
The patent performs preliminary surface preparation by forming the mandrel and metal layers before creating contact holes, establishing a uniform base surface. This preliminary action ensures that subsequent dielectric deposition occurs on a uniform surface, preventing the formation of non-uniform interfaces that would increase resistance and capacitance
Solution Approach 2:
The patent introduces a mandrel structure as an intermediary element that facilitates uniform metal layer deposition. The mandrel serves as a template or mediator that ensures the metal layer is deposited uniformly before the contact holes are etched, thereby maintaining surface uniformity throughout the fabrication process
Data Source
AI summary
A method for fabricating a semiconductor arrangement includes removing a portion of a first dielectric layer to form a first recess defined by sidewalls of the first dielectric layer, forming a first conductive layer in the first recess, removing a portion of the first conductive layer to form a second recess defined by the sidewalls of the first dielectric layer, forming a second conductive layer in the second recess, where the second conductive layer contacts the first conductive layer, forming a second dielectric layer over the second conductive layer, removing a portion of the second dielectric layer to form a third recess defined by sidewalls of the second dielectric layer, where the second conductive layer is exposed through the third recess, and forming a third conductive layer in the third recess, where the third conductive layer contacts the second conductive layer.