Semiconductor Contact Resistance Reduction via Surface Roughening
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Solution Overview
Problem
As integrated circuit dimensions shrink, the reduction of contact area leads to increased contact resistance in semiconductor devices, which hinders device performance.
Innovation Solution
The use of an oxidative gas cluster ion beam process to form an irregular oxide layer on contact landings, followed by a cleaning process to create a roughened surface with a surface roughness of 1 nanometer to 10 nanometers, which is then filled with a conductive metal to reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the contact area is reduced to shrink integrated circuit dimensions, then the device density is improved, but the contact resistance increases
Solution Approach 1:
The patent transitions from a planar contact surface to a three-dimensional roughened surface topology. By creating surface irregularities with controlled roughness (Ra = 1-10 nm), the contact interface gains additional surface area in the vertical dimension, effectively increasing the contact area without expanding the lateral footprint of the contact structure.
Solution Approach 2:
The patent modifies the surface roughness parameter of the contact landing to optimize contact resistance. By controlling the root mean square roughness (Ra) within a specific range of 1-10 nanometers, the invention changes the physical state of the contact surface to achieve lower contact resistance while maintaining the required geometric constraints for scaled-down device dimensions.
2Reliability
If the contact area is increased to reduce contact resistance, then the contact resistance is improved, but the device density decreases
Solution Approach 1:
The invention resolves this contradiction by utilizing the vertical dimension through surface roughness modulation. The roughened contact landing provides increased effective contact area through three-dimensional surface topology rather than lateral expansion, thereby reducing contact resistance without compromising the lateral pitch and device density.
3Manufacturing precision
If a smooth planar contact surface is used, then the manufacturing precision is improved, but the contact resistance increases
Solution Approach 1:
The patent optimizes the surface roughness parameter within a narrowly defined range (Ra = 1-10 nm) to achieve the desired balance. This controlled roughness modification can be accomplished through standard semiconductor processing techniques such as plasma treatment or controlled oxidation followed by etching, maintaining compatibility with existing manufacturing precision requirements while significantly improving contact resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the surface area of contact landings, effectively reducing contact resistance and improving device performance by enhancing the contact between the conductive metal and the semiconductor substrate.
Implementation Method 1
An oxidative gas cluster ion beam process is then performed to the at least one contact landing, wherein oxidative gas cluster ion beam process forms an irregular oxide layer on an exposed surface of the at least one contact landing
Implementation Method 2
a cleaning process is performed to selectively remove the irregular oxide layer from the exposed surface of the at least one contact landing
Data Source
AI summary
An interconnect structure and methods of forming the interconnect structure an interconnect dielectric including at least one contact landing within the interconnect dielectric and/or underlying the interconnect dielectric. The structure and methods include roughening an exposed surface of at least one contact landing to increase the surface area of a conductive metal subsequently disposed in a contact feature and in direct contact with the roughened surface of the least one contact landing.