Semiconductor Contact Structure with Stacked Layers for Reduced Resistance
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing contact resistance between wires and source or drain layers, which affects the output characteristics of field effect transistors.
Innovation Solution
The semiconductor device incorporates a contact structure with a stacked body of alternately layered first and second layers, where the second layer has a smaller dimension than the first layer, creating a recess that increases the contact area between the first and second contacts, thereby reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional contact structure is used, then the device structure is simple, but the contact resistance between wires and source or drain layers is high
Solution Approach 1:
The contact structure is divided into multiple stacked layers (first layers and second layers) with alternating dimensions. Each layer segment contributes to the overall contact area, breaking down the single contact interface into multiple sequential contact regions that collectively reduce resistance.
Solution Approach 2:
The contact structure transitions from a conventional planar contact to a three-dimensional stacked configuration. By adding the vertical dimension with alternating layer dimensions, the contact area is expanded without increasing the lateral footprint, effectively reducing contact resistance while managing structural complexity.
2Reliability
If the contact area between contacts is increased, then the resistance is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
Different layers in the stacked contact structure have different local dimensions (first layers have larger dimensions, second layers have smaller dimensions). This local variation in quality creates recess regions that increase contact area while the alternating pattern provides natural alignment references that can simplify manufacturing precision requirements.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a source or drain layer provided in the semiconductor substrate, a gate insulation layer provided on a surface of the semiconductor substrate, and a gate electrode that is provided on the gate insulation layer. The semiconductor device further includes a first contact that is provided on the source or drain layer, the first contact including a stacked body in which a plurality of first layers and one or more second layers are alternately stacked, and a second contact that faces at least one of a side surface and an upper surface of the first contact disposed on the source or drain layer.