Semiconductor Contact Structure Layout for 3D Memory Reliability
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Solution Overview
Problem
The existing two-dimensional non-volatile memory elements have reached integration limits, necessitating the development of three-dimensional structures with improved operation reliability, but these structures present challenges in manufacturing complexity and cost.
Innovation Solution
The semiconductor device incorporates specific contact structures, including plug-shaped, slit-shaped, and third contact structures, formed through multiple interlayer insulating films and an etch stop film, which simplify the manufacturing process and enhance structural stability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If three-dimensional non-volatile memory elements are implemented to overcome integration limits, then memory capacity and operation reliability are improved, but manufacturing complexity and cost increase
Solution Approach 1:
The contact structures are divided into multiple types (first contact structures passing through first interlayer insulating film, second contact structures passing through second interlayer insulating film, and third contact structures in third interlayer insulating film) with different functions and positions. This segmentation allows each contact structure to be optimized for its specific purpose, improving overall reliability while maintaining manageable manufacturing complexity through modular design
Solution Approach 2:
The patent transitions from two-dimensional planar contact structures to three-dimensional vertically-stacked contact structures. Multiple contact structures are arranged at different height levels (different interlayer insulating films), enabling vertical interconnection paths that increase memory capacity without expanding planar area, thereby improving integration density and operation reliability
2Quantity of substance
If three-dimensional non-volatile memory elements are implemented to overcome integration limits, then memory capacity is improved, but manufacturing cost increases
Solution Approach 1:
Multiple contact structures (first, second, and third contact structures) are integrated into a unified three-dimensional memory architecture that serves multiple functions: data storage, vertical interconnection, and address routing. This multi-functional design increases memory capacity while consolidating manufacturing processes, potentially reducing overall manufacturing cost despite the three-dimensional complexity
Solution Approach 2:
The patent implements nested contact structures where third contact structures are positioned within or adjacent to second contact structures, which in turn are positioned relative to first contact structures across different interlayer insulating films. This nesting arrangement maximizes memory capacity within a compact volume while sharing common manufacturing steps across nested levels, reducing per-unit manufacturing cost
Data Source
AI summary
A semiconductor device may include a plurality of first contact structures, plug-shaped second contact structures configured to be connected to a first number of the plurality of first contact structures, respectively, a slit-shaped second contact structure configured to be connected to a second number of the plurality of first contact structures, adjacent in a first direction, and a third contact structure configured to be connected to sidewalls of the plug-shaped second contact structures, adjacent in the first direction.