Semiconductor Contact Width Variation for Focus Margin

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Solution Overview

Problem

The formation of contact holes in semiconductor devices with large step height differences on insulating films is challenging due to focus margin limitations in lithography tools, leading to size discrepancies and contact failures such as variations in contact resistance or disconnection between wiring lines, which degrade the semiconductor device's characteristics.

Innovation Solution

The semiconductor device design features a first contact portion with a smaller width and a second contact portion with a larger width, strategically positioned to accommodate the step height difference, increasing the focus margin and reducing the likelihood of dimensional deviations or non-opening issues, thereby minimizing contact failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If contact holes are formed using conventional lithography patterning, then contact holes can be created for electrical connection, but when there is a large step height difference in the insulating film surface, the contact hole size deviates from design values or contact holes fail to open

Engineering Contradiction:
Improvecontact hole size precisionVSAvoidstep height difference effect
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by making the second contact portion wider than the first contact portion. This local structural variation allows the second contact portion to have a larger focus margin in the lithography process, enabling it to be formed accurately despite the step height difference caused by the dummy gate wiring layer. The different widths are strategically assigned to different locations based on their specific formation challenges.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs asymmetry by designing the second contact portion with a larger width compared to the first contact portion. This asymmetric design addresses the uneven step height conditions where the second contact portion needs to overcome the additional height obstacle created by the dummy gate wiring layer, while the first contact portion can be formed with standard dimensions.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the step height difference exceeds the focus margin of the lithography tool, then contact holes may be formed, but the contact hole size differs from design values or contact holes do not open

Engineering Contradiction:
Improvecontact hole formation reliabilityVSAvoidcontact hole size control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the geometric parameter (width) of the contact portions to address the focus margin limitation. By increasing the width of the second contact portion, the focus margin is effectively increased, allowing the lithography tool to maintain sufficient depth of field to form both contact holes at different heights with acceptable size control and formation reliability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9947574B2Semiconductor device
Publication Date: 2018.04.17 KK TOSHIBA
  • US9947574B2 patent drawing
  • US9947574B2 patent drawing
  • US9947574B2 patent drawing

AI summary

A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first conductive layer provided on the first insulating film, a second insulating film provided on the semiconductor layer and the first conductive layer, a second conductive layer provided on the second insulating film, a first contact portion connecting the semiconductor layer and the second conductive layer, and a second contact portion connecting the first conductive layer and the second conductive layer. A distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the second contact portion is greater than a distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the first contact portion. The second contact portion has a larger width than the first contact portion.