Semiconductor Device Contaminated Interface Mitigation

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Solution Overview

Problem

Semiconductor devices with organic components, such as OLEDs, are prone to contamination during photolithographic processes, leading to degraded electrical characteristics and reliability.

Innovation Solution

A manufacturing process for semiconductor devices that involves forming specific layers, including hole-transporting and electron-transporting layers with organic components, while incorporating methods to mitigate contamination, such as using metal oxide layers or p-doped surfaces, and performing photolithographic patterning steps to control the layer formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photolithographic patterning steps are performed during manufacturing, then device features and patterns can be formed, but contaminants and residues are introduced that degrade electrical characteristics

Engineering Contradiction:
Improvepattern formation precisionVSAvoidelectrical characteristics
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

An intermediary layer is introduced between the organic semiconductor layer and the photolithographic patterned layer. This intermediary layer acts as a barrier that prevents contaminants and residues from the photolithographic process from reaching and degrading the organic semiconductor layer, while still allowing the pattern transfer to occur effectively.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The intermediary layer is deposited beforehand, before the photolithographic patterning steps are performed. This preliminary action ensures that the protective barrier is already in place to prevent contamination during subsequent pattern formation processes.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If photoresist stripping is performed to complete patterning, then patterned structures are achieved, but residue layers remain that increase charge trapping

Engineering Contradiction:
Improvepattern transfer accuracyVSAvoidcharge trapping
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The intermediary layer serves as a protective barrier that prevents residues from the photoresist stripping process from directly contacting the organic semiconductor layer. This mediation eliminates the harmful effect of charge trapping while preserving the pattern transfer functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The potential harm of residues from photoresist stripping is converted into a benefit by using the stripping process to define the pattern in the intermediary layer itself. The residues that would normally contaminate the organic layer instead become part of the patterned intermediary structure, which still provides protection.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed process effectively reduces the impact of contaminants on the electrical performance of semiconductor devices, improving their reliability and efficiency by minimizing the need for actual impurity removal.

Implementation Method 1

a thin layer may be adsorbed, either physisorbed or chemisorbed, on its surface or reacted therewith

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 2

illuminating pattern-wise the photoresist with an appropriate electromagnetic radiation spectrum and dose

Methodology Applied
Scientific EffectPhoto-oxidation: Photo-oxidation

Data Source

PatentUS12324301B2Contaminated interface mitigation in a semiconductor device
Publication Date: 2025.06.03 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US12324301B2 patent drawing
  • US12324301B2 patent drawing
  • US12324301B2 patent drawing

AI summary

A semiconductor device comprises a substrate, a first hole-transporting layer over the substrate, a first electron-transporting layer on the first hole-transporting layer, and a second hole-transporting layer over the first electron-transporting layer. At least one of the first electron-transporting layer and the second hole-transporting layer has an organic component. The device is characterized by one of the following: a metal oxide layer present on the first electron-transporting layer, wherein a second electron-transporting layer is on the metal oxide layer, wherein the second hole-transporting layer is on the second electron-transporting layer, or the second hole transporting layer has a first p-doped hole-transporting surface present on the first electron-transporting, layer and a second p-doped hole-transporting surface facing away from the first p-doped hole-transporting surface, or the first electron-transporting layer is on a top surface and on sidewalls of the first hole-transporting layer.