Parallel Semiconductor Control Circuit Inductance Management

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Solution Overview

Problem

In power conversion apparatuses, when multiple semiconductor elements are caused to switch simultaneously, variations in voltages applied to their control electrodes can occur due to parasitic inductance in the reference wiring, leading to potential degradation of semiconductor elements with higher voltages and failure to turn on those with lower voltages.

Innovation Solution

The power conversion apparatus is designed with a control circuit unit that connects semiconductor elements in parallel, where the parasitic inductance in the reference wiring is made smaller than in the control wiring, reducing induced electromotive forces and voltage variations across control electrodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a plurality of semiconductor elements are caused to perform switching at the same time, then the output current capability is improved, but voltage variations occur at control electrodes due to parasitic inductance in reference wiring

Engineering Contradiction:

Improveoutput current capabilityVSAvoidvoltage stability at control electrodes

Core Design Contradiction:

PowerVSReliability

Solution Approach 1:

The patent divides the reference wiring into multiple separate reference wirings, each connecting to a specific semiconductor element's reference electrode. This segmentation reduces the parasitic inductance in each individual reference wiring, thereby minimizing induced electromotive force and voltage variations at control electrodes when multiple semiconductor elements switch simultaneously.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent makes the parasitic inductance in reference wirings smaller than in control wirings by optimizing the reference wiring configuration. This local quality improvement ensures that voltage variations due to parasitic inductance are minimized specifically at the reference electrodes, maintaining stable control voltages for parallel-switching semiconductor elements.

Inventive Principle:

Principle #3Local quality

2Reliability

If parasitic inductance in reference wiring is reduced, then voltage variations are suppressed, but wiring configuration complexity increases

Engineering Contradiction:

Improvevoltage stability at control electrodesVSAvoidwiring configuration

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the reference wiring into multiple separate reference wirings, each with reduced parasitic inductance. While this increases the number of wiring paths, each individual wiring becomes simpler and more efficient, reducing voltage variations without requiring complex wiring structures.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent configures reference wirings to maintain equipotential conditions at reference electrodes by minimizing parasitic inductance. This ensures that all reference electrodes remain at the same potential level during switching operations, simplifying the voltage reference system while improving reliability.

Inventive Principle:

Principle #12Equipotentiality

3Productivity

If multiple semiconductor elements switch simultaneously, then productivity is improved, but semiconductor element degradation occurs due to excessive voltage at control electrodes

Engineering Contradiction:

Improveswitching efficiencyVSAvoidexcessive voltage at control electrodes

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the reference wiring system into multiple separate reference wirings, each with minimized parasitic inductance. This reduces induced electromotive force during simultaneous switching, preventing excessive voltage spikes at control electrodes that could cause semiconductor element degradation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent preemptively reduces parasitic inductance in reference wirings before switching operations occur. This preliminary design prevents induced electromotive force and excessive voltage spikes from occurring in the first place, protecting semiconductor elements from degradation during high-speed simultaneous switching.

Inventive Principle:

Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses voltage variations applied to control electrodes, preventing semiconductor element degradation and ensuring correct operation by maintaining optimal voltage levels across all elements.

Implementation Method 1

induced electromotive force ΔV (=LKE di/dt) occurs due to a parasitic inductance LKE in the reference wiring

Methodology Applied

Scientific EffectParasitic inductance: Inductor

Data Source

PatentUS10454386B2Power conversion apparatus

Publication Date: 2019.10.22 DENSO CORP

AI summary

A plurality of semiconductor elements and a control circuit unit are provided. The plurality of semiconductor elements which are connected in parallel are configured to perform switching at the same time. The control circuit unit includes a drive circuit connected to the plurality of semiconductor elements which perform operation at the same time, control wirings and reference wirings. The control wirings connect control electrodes of the semiconductor elements to the drive circuit. The reference wirings connect reference electrodes of the semiconductor elements to the drive circuit. A parasitic inductance in the reference wiring is made smaller than a parasitic inductance in the control wiring.