Semiconductor Device Convex Substrate Breakdown Voltage On-Resistance Trade-off
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Solution Overview
Problem
Conventional semiconductor devices with a super junction structure face challenges in reducing on-resistance due to the effective channel width reduction caused by the p-type pillar region, making it difficult to achieve both high breakdown voltage and low on-resistance.
Innovation Solution
The semiconductor device incorporates a semiconductor substrate with convex portions and regions of different conductivity types to form pn junctions, allowing for a higher breakdown voltage and lower on-resistance by maintaining the channel width and optimizing the depletion layer distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a super junction structure with p-type pillar region is applied to LDMOS, then breakdown voltage is improved, but effective channel width is reduced causing increased on-resistance
Solution Approach 1:
The invention transitions from a planar super junction structure to a three-dimensional structure by forming a convex portion protruding from the semiconductor substrate surface. The pn junction is formed within this convex portion, allowing the depletion layer to extend vertically into the substrate while maintaining a wide effective channel width at the surface level, thus resolving the contradiction between breakdown voltage and on-resistance
Solution Approach 2:
The invention applies different structural qualities to different regions: the convex portion contains the pn junction with specific impurity concentrations optimized for breakdown voltage, while the surrounding channel region maintains high width and low resistance. The first region has lower impurity concentration than the drain region to facilitate depletion layer formation, creating localized functional zones that independently optimize for their respective purposes
2Reliability
If n-type impurity concentration in drift region is increased to reduce on-resistance, then on-resistance is improved, but breakdown voltage deteriorates
Solution Approach 1:
The invention segments the depletion layer formation into two distinct locations: the pn junction within the convex portion generates the primary depletion layer that extends vertically, while the drift region impurity concentration is optimized for low on-resistance. This segmentation allows independent optimization of breakdown voltage (via pn junction geometry) and on-resistance (via drift region doping), resolving the traditional trade-off
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables a trade-off between high breakdown voltage and low on-resistance, with improved reliability and uniform potential distribution, allowing for increased n-type impurity concentration in the drift region to reduce on-resistance further.
Implementation Method 1
a second region of a second conductivity type arranged in the convex portion so as to form a pn junction with the first region
Implementation Method 2
improved reliability and uniform potential distribution, allowing for increased n-type impurity concentration in the drift region to reduce on-resistance further
Data Source
AI summary
A semiconductor device and a method of manufacturing the semiconductor device to achieve both of a high breakdown voltage and a low on resistance are provided. A semiconductor substrate includes a convex portion protruding upward from a surface of the semiconductor substrate. An n-type drift region is arranged on the semiconductor substrate so as to be positioned between a gate electrode and an n+-type drain region in plan view, and has an impurity concentration lower than an impurity concentration of the n+-type drain region. A p-type resurf region is arranged in the convex portion and forms a pn junction with the n-type drift region.