Semiconductor Die Packaging with Copper Flange and Lead-Free Die Attach

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Solution Overview

Problem

High power semiconductor packages face heat transfer issues due to high resistivity die attach materials and require expensive ceramic components, limiting their thermal conductivity and compatibility with high frequency applications, while also being costly and restricted to single chip packaging.

Innovation Solution

A lead-free die attach material and a copper or non-ceramic flange with improved thermal conductivity, allowing for multi-chip packaging in a single package with reduced size and cost, using a gold silicon die attach and overmolded plastic to enhance reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If high resistivity die attach materials with high lead content are used, then the package can be manufactured with traditional processes, but the thermal conductivity is limited to approximately twenty to thirty watts per meter Kelvin

Engineering Contradiction:

ImprovemanufacturabilityVSAvoidthermal conductivity

Core Design Contradiction:

Ease of manufactureVSTemperature

Solution Approach 1:

The patent changes the material composition parameters by using lead-free die attach materials with copper content greater than 80%, which fundamentally alters the thermal conductivity parameter from 20-30 w/m-K to greater than 350 w/m-K, while maintaining compatibility with traditional manufacturing processes

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures including copper-flanged substrates combined with lead-free die attach materials containing copper, silver, and other metals, creating a multi-material system that achieves superior thermal conductivity while remaining manufacturable

Inventive Principle:

Principle #40Composite materials

2Reliability

If air cavity packages with ceramic components are used, then high frequency performance can be achieved, but the cost increases significantly

Engineering Contradiction:

Improvehigh frequency performanceVSAvoidcost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces expensive ceramic components with a plastic encapsulant that provides sufficient protection and performance for high frequency applications, significantly reducing material costs while maintaining functional reliability

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the package construction parameters by eliminating air cavities and ceramic materials, using instead a solid plastic encapsulant with copper flanges that provides equivalent or superior high frequency performance at lower cost

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If single chip packaging is used, then the package structure is simplified, but multiple components require separate packages increasing footprint

Engineering Contradiction:

Improvepackage structureVSAvoidfootprint

Core Design Contradiction:

Device complexityVSArea of stationary object

Solution Approach 1:

The patent merges multiple semiconductor chips and their associated components into a single integrated package with a common copper flange substrate, reducing the total footprint by consolidating what would otherwise require multiple separate packages while maintaining manageable structural complexity

Inventive Principle:

Principle #5Merging (Combining)

4Temperature

If lead-free die attach material with copper content greater than 80% is used, then thermal conductivity is improved to greater than 350 watts per meter Kelvin, but the material composition requirements become more stringent

Engineering Contradiction:

Improvethermal conductivityVSAvoidmaterial composition control

Core Design Contradiction:

TemperatureVSEase of manufacture

Solution Approach 1:

The patent establishes specific parameter ranges for the die attach material (copper content greater than 80%, melting temperature greater than 250°C) that optimize thermal conductivity while remaining compatible with existing manufacturing processes through proper parameter selection

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides better thermal conductivity, reduced size, and lower costs compared to traditional packages, enabling improved reliability and high frequency performance without the need for air cavity packages, while allowing for multiple semiconductor chips to be packaged in a single, compact unit.

Implementation Method 1

a copper or non-ceramic flange with improved thermal conductivity

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

A lead-free die attach material and a copper or non-ceramic flange with improved thermal conductivity

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS7445967B2Method of packaging a semiconductor die and package thereof

Publication Date: 2008.11.04 NXP USA INC

AI summary

A method of packaging a semiconductor die includes the steps of providing a flange (110), coupling one or more active die (341) to the flange with a lead-free die attach material (350), staking a leadframe (120) to the flange after coupling the one or more active die to the flange, electrically interconnecting the one or more active die and the leadframe with an interconnect structure (470), and applying a plastic material (130) over the flange, the one or more active die, the leadframe, and the interconnect structure.