Semiconductor Assembly Copper-Solder Bonding for Thermal Dissipation
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Solution Overview
Problem
Existing semiconductor devices face limitations in thermal dissipation and operational temperature due to bonded wire connections, particularly when using silicon carbide, which poses challenges in semiconductor packaging.
Innovation Solution
The use of a metallic bonding layer composed of solder and copper to connect semiconductor devices to substrates, enhancing thermal dissipation by incorporating copper to reduce thermal expansion mismatch and improve mechanical strength, with a single reflow process forming both bonding layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If bonded wire connections are used to connect semiconductor devices to substrates, then electrical connection is achieved, but thermal dissipation capability is limited
Solution Approach 1:
The patent changes the material parameters of the bonding layer from traditional bonded wire to a metallic bonding layer composed of solder and copper. This material parameter change enables superior thermal conductivity while maintaining electrical connection, thereby improving thermal dissipation and expanding the operational temperature range of the semiconductor device.
Solution Approach 2:
The patent employs a composite metallic bonding layer made of solder and copper materials. The copper provides excellent thermal and electrical conductivity, while the solder ensures reliable bonding. This composite structure achieves both superior thermal dissipation and mechanical strength, resolving the contradiction between energy loss and reliability.
2Power
If silicon carbide is used for semiconductor devices, then power handling capability is improved, but thermal dissipation becomes more challenging in packaging
Solution Approach 1:
The patent addresses the thermal dissipation challenge of silicon carbide devices by changing the bonding layer material parameters to include copper, which has superior thermal conductivity. This enables effective heat removal from high-power silicon carbide devices, allowing them to operate at elevated temperatures while maintaining reliable thermal management.
3Strength
If traditional bonding layers are used, then manufacturing process is simple, but mechanical strength and thermal dissipation are insufficient
Solution Approach 1:
The patent uses a composite metallic bonding layer of solder and copper that can be applied through a single reflow process. While the material composition is enhanced for superior strength and thermal properties, the manufacturing process remains relatively simple, avoiding excessive complexity while achieving improved mechanical strength and thermal dissipation.
4Reliability
If multiple processes are used to form bonding layers, then bonding quality is improved, but manufacturing time and cost increase
Solution Approach 1:
The patent merges the formation of both bonding layers into a single reflow process. The metallic bonding layer composition is designed to bond simultaneously to both the semiconductor device and the substrate in one heating cycle, eliminating the need for separate bonding steps. This reduces manufacturing time and cost while maintaining reliable bonding quality through optimized material composition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases thermal dissipation and mechanical strength, allowing operation at high temperatures and reducing manufacturing costs and time by integrating copper into the bonding layers, suitable for silicon and silicon carbide semiconductors.
Implementation Method 1
The second bonding layer (16) provides an electrical and mechanical connection between the primary metallic surface (22) and the second substrate (18)... the second bonding layer (16) is composed of solder or both solder and copper material... incorporating copper to reduce thermal expansion mismatch and improve mechanical strength
Implementation Method 2
incorporating copper to reduce thermal expansion mismatch... the copper in the first bonding layer (12) or the second bonding layer (16), respectively, reduces a mismatch (and associated thermal stress) between the primary CTE and the secondary CTE
Data Source
Figure 1
Figure 2
Figure 3A~3B
AI summary
An electronic assembly (111, 211, 311) comprises a semiconductor device (14) with a first side (42) and a second side (44) opposite the first side (42). The first side (42) has a first conductive pad (34). The second side (44) has a primary metallic surface (22, 122). A first substrate (e.g. lead frame) (10, 110) is bonded to the first conductive pad (34) via a first metallic bonding layer (12, 112). A second substrate (e.g., heat sinking circuit board) (18, 24) is bonded to the primary metallic surface (22, 122) via a second metallic bonding layer (16, 116). The first and second metallic bonding layers (12, 16, 112, 116) are composed of solder or of solder and copper, e.g., copper particles, copper flakes, copper pellets or copper fillers, wherein the copper pellets may be coated with a solderable finish such as tin, silver or electroless nickel immersion gold (ENIG). In the first bonding layer (12), the second bonding layer (16) or both, the copper content can facilitate enhanced heat dissipation from the semiconductor device (14), can promote improved thermomechanical strength of one or more bonding layers (12, 16) and can reduce mismatch and associated thermal stress resulting from a difference in coefficients of thermal expansion of the semiconductor device (14) and the first substrate (10) (e.g., lead frame) or secondary substrate (18) (e.g., heat sink). The first metallic bonding layer (12, 112) may be arranged as a first matrix of islands of solder. The lead frame (10, 110) may have a substantially planar portion (46) having a lower surface for interfacing with the first conductive pad (34) on the semiconductor device (14) and having an upper surface for coupling or receiving, directly or indirectly, a first heat sink (20). The substantially planar portion (46) of the lead frame (110) may comprise holes (54) serving as solder outgassing outlets and also allowing for the creation of an array of solder fillets on the surface of the lead frame (110) at the end of soldering. The first side (42) of the semiconductor device (14) may have the first conductive pad (34), a second conductive pad (38), and a third conductive pad (40). The second side (44) of the semiconductor device (14) may comprise the primary metallic surface (22) and a secondary metallic surface (23), where the primary metallic surface (22) and the secondary metallic surface (23) are spaced apart and separated by a dielectric region (45) or dielectric barrier. Alternatively, the primary metallic surface (122) may form a metallic ground plane. The electronic assembly (211) may further comprise a supplemental substrate (56) or circuit board that intervenes between the second substrate or second heat sink (24) and the semiconductor device (14). The semiconductor device (14) may comprise a semiconductor die, such as an insulated gate bipolar transistor (IGBT) or an insulated gate bipolar transistor and a diode on or in a direct bonded copper carrier or semiconductor substrate.