Semiconductor Mounting on Copper Heat Sink via Intermediate Submount
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Solution Overview
Problem
Existing methods for mounting semiconductor devices on thermally mismatched substrates, such as semiconductor laser diodes on copper heat sinks, result in significant residual mechanical stress due to the use of hard solders and require additional processing steps or expensive submount materials, which increase manufacturing time and cost.
Innovation Solution
A method involving a heat sink and a submount with solder films on both sides, where the coefficients of thermal expansion of the semiconductor device, submount, and heat sink are matched by adjusting the submount's thickness, allowing for low-stress mounting without external pressure and using a single-step soldering process with high-melting-point solder films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If hard solder is used to mount semiconductor device on copper heat sink, then mechanical stability is improved, but residual mechanical stress increases significantly
Solution Approach 1:
A submount made of material with intermediate coefficient of thermal expansion (e.g., Invar, Kovar, or ceramic) is introduced between the semiconductor device and copper heat sink. This intermediary layer acts as a stress buffer, reducing the thermal mismatch stress while maintaining mechanical stability through proper material selection and thickness design.
Solution Approach 2:
The coefficient of thermal expansion parameter is carefully selected for the submount material to fall between that of the semiconductor device and copper heat sink. By changing the material parameter (CTE) of the intermediate layer, the overall stress in the assembly is reduced while maintaining strong mechanical bonding.
2Stress or pressure
If submount is used to match coefficient of thermal expansion, then residual stress is reduced, but manufacturing complexity and cost increase
Solution Approach 1:
The submount is designed with uniform thickness and homogeneous material composition to ensure consistent stress distribution. This simplifies the manufacturing process by eliminating the need for complex variable-thickness submounts while still achieving effective stress reduction through proper material selection.
Solution Approach 2:
Standardized submount materials with known CTE values (such as Invar, Kovar, or specific ceramics) are selected to match common semiconductor device parameters. This standardization reduces manufacturing complexity by allowing off-the-shelf components to be used rather than requiring custom-designed and manufactured submounts.
3Stress or pressure
If submount is used for thermal matching, then stress reduction is achieved, but manufacturing time and cost increase
Solution Approach 1:
The submount is pre-coated with solder material before mounting the semiconductor device. This preliminary preparation allows the entire assembly (heat sink + submount + device) to be soldered in a single step, eliminating the need for separate soldering operations and reducing total manufacturing time while still achieving stress reduction benefits.
Solution Approach 2:
The mounting of the semiconductor device to the heat sink via the submount is combined into a single soldering operation. By merging multiple steps (submount attachment + device attachment) into one simultaneous soldering process, manufacturing time is reduced while the stress-reducing benefits of the submount are preserved.
4Stability of the object's composition
If expensive thermally matching alloys are used, then coefficient of thermal expansion matching is improved, but manufacturing cost increases
Solution Approach 1:
Instead of using expensive custom alloys, standard submount materials (Invar, Kovar, aluminum nitride, silicon carbide) with well-known and suitable CTE values are used as intermediaries. This approach achieves effective thermal matching at lower cost by selecting from commercially available materials rather than requiring custom alloy development and production.
Solution Approach 2:
The submount acts as a sacrificial or disposable stress-management layer that can be made from relatively inexpensive standard materials. Rather than investing in expensive custom thermally-matched alloys, the design accepts the use of simpler, cheaper submount materials that still achieve the necessary stress reduction function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces residual mechanical stress in semiconductor devices to levels below 10 MPa, ensuring high mechanical stability and reliability while avoiding the need for expensive submount materials and complex processing steps, and allows the use of inexpensive heat sink materials with high thermal expansion coefficients.
Implementation Method 1
melting the solder films on both sides of the submount
Implementation Method 2
allowing the solder films to cool and solidify
Implementation Method 3
Heat removal is achieved by mounting a semiconductor device onto a heat sink made of a material having a good thermal conductivity
Implementation Method 4
A laser diode chip has to be mounted at a certain position relative to a collimating lens. A shift of the chip relative to the lens degrades a laser performance
Data Source
AI summary
A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor device is in between the values of coefficients of thermal expansion of the materials of the submount and the heat sink, the thickness of the submount being chosen so as to equalize thermal expansion of the semiconductor device to that of the surface of the submount the device is mounted on. According to another aspect of the invention, the semiconductor device, the submount, and the heat sink are soldered into a stack at a single step of heating, which facilitates reduction of residual post-soldering stresses.