Semiconductor Core Structure Mitigates IPD Thermal Stress
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Solution Overview
Problem
The integration of Integrated Passive Device (IPD) structures with semiconductor devices often results in low-reliability devices due to thermal expansion mismatch between the high resistivity substrate of the IPD and the integrated die or chips, leading to structural damage and reliability issues.
Innovation Solution
The method involves forming an IPD structure within the semiconductor device, including an inductor, and using a low-loss encapsulant with a thickness greater than 50 micrometers over the inductor, and mounting a semiconductor core over the encapsulant to minimize thermal expansion mismatch, or using a lossy semiconductor core with a low-loss encapsulant to balance thermal coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IPD structure is integrated with semiconductor device, then device functionality is improved, but reliability deteriorates due to thermal expansion mismatch
Solution Approach 1:
A dummy die is introduced as an intermediary component between the IPD structure and the semiconductor device. This dummy die has thermal expansion properties that match the IPD substrate, serving as a buffer to absorb thermal stress and prevent damage to the integrated structure, thereby maintaining both functionality and reliability
2Measurement precision
If high resistivity substrate is used for IPD structure, then electrical performance is improved, but thermal expansion mismatch increases causing structural damage
Solution Approach 1:
The dummy die acts as a mediator layer between the high resistivity IPD substrate and the semiconductor device. It provides mechanical support and absorbs differential thermal expansion, protecting the structurally vulnerable high resistivity substrate while preserving its electrical performance characteristics
3Device complexity
If die and chips are integrated with IPD structure, then device complexity is reduced, but thermal stress increases causing internal structure damage
Solution Approach 1:
The dummy die is placed beforehand as a cushioning layer between the IPD structure and the integrated die/chips. It preemptively absorbs and distributes thermal stress before it can propagate to the internal structures, enabling complex integration while mitigating stress-related damage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by reducing thermal stress and improving thermal conductivity, leading to more stable and efficient semiconductor packages with reduced warpage and increased heat dissipation.
Implementation Method 1
Because the coefficient of thermal expansion (CTE) of the high resistivity substrate of the IPD structure is often different from that of the integrated die or chips, the devices expand and contract at different rates as their overall temperature changes. The resulting expansion mismatch can result in damage to the internal structure of the semiconductor package
Implementation Method 2
improving thermal conductivity, leading to more stable and efficient semiconductor packages with reduced warpage and increased heat dissipation
Data Source
AI summary
A semiconductor device includes an IPD structure, a first semiconductor die mounted to the IPD structure with a flipchip interconnect, and a plurality of first conductive posts that are disposed adjacent to the first semiconductor die. The semiconductor device further includes a first molding compound that is disposed over the first conductive posts and first semiconductor die, a core structure bonded to the first conductive posts over the first semiconductor die, and a plurality of conductive TSVs disposed in the core structure. The semiconductor device further includes a plurality of second conductive posts that are disposed over the core structure, a second semiconductor die mounted over the core structure, and a second molding compound disposed over the second conductive posts and the second semiconductor die. The second semiconductor die is electrically connected to the core structure.