Semiconductor Package Corner Dummy Pads for Underfill Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packages face challenges in ensuring reliable underfill of the underfill layer in corner regions, leading to potential unfill problems and non-wet defects.
Innovation Solution
The semiconductor package includes a first semiconductor die with corner regions that overlap the second semiconductor die, featuring redistribution patterns with dummy and signal wirings, and conductive pads with a higher pattern density in corner regions, which helps in narrowing the distance between the semiconductor dies and preventing unfill issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the underfill layer is applied in conventional semiconductor packages, then the semiconductor dies are electrically connected, but unfill problems and non-wet defects occur in corner regions
Solution Approach 1:
The patent applies local quality by creating dummy structures specifically in corner regions where underfill problems occur. These dummy pads, dummy vias, and dummy wirings are localized to corner areas rather than being uniformly distributed, providing targeted improvement to underfill coverage in problematic regions while maintaining normal structure in other areas.
Solution Approach 2:
The dummy structures are formed during the manufacturing process before the underfill layer is applied. This preliminary action of creating dummy pads, vias, and wirings in corner regions prepares the surface to guide proper underfill flow and prevent unfill defects before they occur during the underfilling process.
2Reliability
If the distance between semiconductor dies is reduced to prevent unfill issues, then underfill coverage improves, but the complexity of alignment and bonding increases
Solution Approach 1:
The dummy structures act as intermediaries between the conventional design and the underfill process. By introducing these dummy pads, vias, and wirings, the patent creates intermediate features that guide underfill flow and improve coverage without requiring changes to the fundamental die spacing or bonding process, thus avoiding increased alignment complexity.
3Reliability
If dummy structures are added to corner regions, then unfill problems are prevented, but the device complexity increases
Solution Approach 1:
The dummy structures are localized only to corner regions where underfill problems occur, rather than being added throughout the entire device. This local application minimizes the increase in overall device complexity while targeting the specific problem areas that need improvement.
Solution Approach 2:
The patent applies partial action by adding dummy structures only where needed (corner regions) rather than uniformly across the entire device. This partial application of dummy structures provides sufficient improvement to prevent unfill problems without unnecessarily increasing device complexity in regions where the problem does not exist.
Data Source
AI summary
A semiconductor package includes a first semiconductor die; a second semiconductor die on the first semiconductor die; and an underfill layer between the first semiconductor die and the second semiconductor die, where the first semiconductor die includes: a first substrate including a main region and first corner regions that are adjacent to respective corners of the second semiconductor die, and where the main region overlaps a center of the second semiconductor die; redistribution patterns that are on the first substrate and include dummy wirings and signal wirings; a redistribution insulating layer on the redistribution patterns; and conductive pads that are on the redistribution insulating layer and include dummy pads and signal pads, where a pattern density of a first set of the conductive pads on the first corner regions is greater than a pattern density of a second set of the conductive pads on the main region.