Semiconductor Device Electroconductive Coupling Members

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Solution Overview

Problem

Conventional semiconductor devices with wiring layers connected by wires are unsuitable for large electric current flow due to thermal stress concentration on insulating substrates, which can lead to cracking.

Innovation Solution

A semiconductor device design featuring electroconductive coupling members with strip sections and connecting sections, connected to mounting layers via ultrasonic bonding, allowing for larger current conduction while reducing thermal stress on substrates by minimizing connection area and using ceramic substrates with copper foil for improved thermal conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If electroconductive members with large cross-sectional area are used to connect wiring layers, then large electric current can flow through the device, but thermal stress concentration increases on the insulating substrates

Engineering Contradiction:
Improveelectric current capacityVSAvoidthermal stress concentration
Core Design Contradiction:
Quantity of substanceVSStress or pressure

Solution Approach 1:

The electroconductive coupling member is divided into multiple strip sections (first, second, third strip sections) instead of using a single solid block. This segmentation reduces the overall contact area with the wiring layers while maintaining current conduction capability, thereby decreasing thermal stress concentration on the insulating substrates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electroconductive coupling member has different structural characteristics at different locations: the strip sections provide localized connection points with reduced area to minimize stress, while the connecting section maintains electrical continuity. This local variation in geometry allows the structure to simultaneously handle large currents and reduce thermal stress concentration.

Inventive Principle:
Principle #3Local quality

2Stress or pressure

If wires are used to connect wiring layers, then thermal stress on substrates is reduced, but the device cannot handle large electric currents

Engineering Contradiction:
Improvethermal stress on substrateVSAvoidelectric current capacity
Core Design Contradiction:
Stress or pressureVSQuantity of substance

Solution Approach 1:

The electroconductive coupling member combines characteristics of both wires and solid conductors. It uses multiple thin strip sections (resembling wires) that are interconnected (resembling solid conductors), creating a composite structure that achieves both low thermal stress and high current capacity.

Inventive Principle:
Principle #40Composite materials

3Reliability

If the connection area between electroconductive members and wiring layers is increased, then electrical connection is improved, but thermal stress concentration on substrates increases

Engineering Contradiction:
Improveelectrical connection qualityVSAvoidthermal stress concentration
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The connection is achieved through multiple discrete strip sections rather than a single large contact area. Each strip section provides a reliable electrical connection point, and the distributed nature of these connections reduces stress concentration compared to a single large bonded area.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the semiconductor device to handle large electric currents while reducing thermal stress concentration on substrates, preventing cracking and enhancing the number of mountable switching elements.

Implementation Method 1

The plurality of electroconductive coupling members are separately connected to the plurality of first mounting layers and to the plurality of second mounting layers

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

connected to mounting layers via ultrasonic bonding

Methodology Applied
Scientific EffectUltrasonic vibration: Ultrasonic Vibration

Data Source

PatentUS11127662B2Semiconductor device
Publication Date: 2021.09.21 ROHM CO LTD
  • US11127662B2 patent drawing
  • US11127662B2 patent drawing
  • US11127662B2 patent drawing

AI summary

The disclosure provides a semiconductor device. The device includes first and second substrates, first mounting layers, second mounting layers, power supply terminals, an output terminal, electroconductive coupling members and switching elements. The first substrate has first obverse and reverse surfaces facing in a thickness direction. The second substrate has a second obverse surface facing as the first obverse surface faces in the thickness direction and a second reverse surface facing away from the second obverse surface. The second substrate is spaced from the first substrate in a first direction crossing the thickness direction. The first mounting layers are electrically conductive and disposed on the first obverse surface. The second mounting layers are electrically conductive and disposed on the second obverse surface. The power supply terminals are electrically connected to the first mounting layers. The output terminal is connected to one of the second mounting layers. The electroconductive coupling members are connected to the first and second mounting layers. The switching elements are mounted on the first and second mounting layers. Each of the electroconductive coupling members has strip sections and a connecting section. The strip sections extend in the first direction and are spaced in a second direction crossing the thickness direction and the first direction. The connecting section extends in the second direction to interconnect the strip sections. The strip sections are connected at one end to the first mounting layer and connected at another end to the second mounting layer.