Semiconductor Package Cover Structure for Low-Stress Precision ICs

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Solution Overview

Problem

Mold compounds used in semiconductor packaging cause mechanical stress on precision ICs due to random distribution and size of filler particles, leading to unpredictable parametric shifts, and existing solutions either use bulky and expensive ceramic packages or coatings that exacerbate the issue.

Innovation Solution

A semiconductor package design featuring a cover that creates a hollow, inert area between itself and the operational component, preventing mold compound filler particles from contacting the precision ICs, and using a mold compound that only covers the die and cover, not the operational component, to minimize mechanical stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If mold compound is used to cover the semiconductor die, then protection from external elements is improved, but mechanical stress on precision ICs increases due to filler particles

Engineering Contradiction:
Improveprotection from moisture and heatVSAvoidmechanical stress on precision ICs
Core Design Contradiction:
Object-affected harmful factorsVSStress or pressure

Solution Approach 1:

The patent segments the packaging structure into distinct regions: a first region containing the precision IC covered by a stress-free encapsulant, and a second region containing other components covered by the mold compound with filler particles. This segmentation allows each region to have optimized protection characteristics without the harmful effects of filler particles contacting the precision IC.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts the precision IC from the general mold compound environment by providing a separate encapsulant specifically for the precision IC. This extraction removes the precision IC from exposure to filler particles while maintaining protection through the dedicated encapsulant material.

Inventive Principle:
Principle #2Taking out (Extraction)

2Stress or pressure

If ceramic packages are used to protect precision ICs, then mechanical stress is reduced, but device complexity and cost increase

Engineering Contradiction:
Improvemechanical stress on precision ICsVSAvoidpackage structure complexity
Core Design Contradiction:
Stress or pressureVSDevice complexity

Solution Approach 1:

The patent uses a composite packaging structure combining different materials: a stress-free encapsulant (such as epoxy or polymer) specifically for the precision IC region, and mold compound for other regions. This composite approach provides the protection of ceramic packages without their complexity and cost, by using compatible materials that can be integrated into the existing molding process.

Inventive Principle:
Principle #40Composite materials

3Object-affected harmful factors

If coatings are applied to precision ICs, then protection is improved, but mechanical stress increases due to additional layer

Engineering Contradiction:
Improveprotection from environmental damageVSAvoidmechanical stress from coating layers
Core Design Contradiction:
Object-affected harmful factorsVSStress or pressure

Solution Approach 1:

The patent applies different protective qualities to different regions: the precision IC receives a stress-free encapsulant with specific protective properties, while other regions receive the standard mold compound. This local quality approach ensures protection where needed without adding unnecessary stress layers to the precision IC.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12198995B2Covers for semiconductor package components
Publication Date: 2025.01.14 TEXAS INSTRUMENTS INC
  • US12198995B2 patent drawing
  • US12198995B2 patent drawing
  • US12198995B2 patent drawing

AI summary

In some examples, a semiconductor package comprises a semiconductor die; an operational component on an active surface of the semiconductor die; and a cover coupled to the active surface of the semiconductor die and covering the operational component. The cover comprises a monolithic structure including a vertical portion and a horizontal portion. A hollow area is between the cover and the operational component. The package also includes a mold compound covering the semiconductor die and the cover.