Power Semiconductor Crack Barrier Structure for Wafer Dicing
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Solution Overview
Problem
Power semiconductor devices are susceptible to damage and deterioration due to crack propagation during the cutting or dicing process of semiconductor wafers, which can compromise their performance and integrity.
Innovation Solution
Incorporation of a crack propagation prevention structure that includes an insulating liner covering the channel layer and substrate surfaces, connected to a source electrode, and optionally a metal silicide layer, to prevent crack transmission and provide moisture absorption prevention and stress release effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a semiconductor wafer is cut or diced into individual devices, then the semiconductor devices can be packaged and deployed, but cracks may propagate during the cutting process causing damage to the devices
Solution Approach 1:
The patent introduces a crack propagation prevention structure that segments the wafer into individual device regions. This structure includes an insulating liner and metal liner that create physical boundaries between adjacent devices, preventing cracks from propagating across the entire wafer during the dicing process. The segmentation allows efficient wafer-level processing while isolating potential crack paths to individual device regions.
Solution Approach 2:
The crack propagation prevention structure acts as an intermediary element between adjacent semiconductor devices. The insulating liner and metal liner form a barrier layer that mediates the stress and crack propagation during wafer dicing. This intermediary structure absorbs and redirects mechanical stresses, preventing them from transmitting to the active device regions while allowing the dicing process to proceed efficiently.
2Device complexity
If the semiconductor device structure is simplified to reduce manufacturing complexity, then manufacturing cost decreases, but the device becomes more susceptible to crack propagation and moisture absorption
Solution Approach 1:
The crack propagation prevention structure serves multiple functions simultaneously: it prevents crack propagation during dicing, provides moisture absorption prevention, and offers stress release capabilities. By integrating these multiple protective functions into a single structural element (the liner structure), the patent avoids increasing overall device complexity while comprehensively addressing reliability concerns.
Solution Approach 2:
The patent employs a composite liner structure consisting of an insulating liner and a metal liner. This composite material approach combines the advantages of different materials: the insulating liner provides electrical isolation and crack prevention, while the metal liner provides mechanical strength and moisture barrier properties. This composite structure achieves enhanced reliability without proportionally increasing manufacturing complexity.
3Reliability
If the crack propagation prevention structure is added to prevent cracks during dicing, then device reliability improves, but the device complexity and manufacturing steps increase
Solution Approach 1:
The crack propagation prevention structure is formed preliminarily during the wafer fabrication process, before the dicing operation. The insulating liner and metal liner are deposited and patterned on the wafer while it is still in bulk form, allowing the structure to be established across all devices simultaneously. This preliminary action ensures protection is in place before any cracking can occur during subsequent dicing, without requiring additional post-dicing processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crack propagation prevention structure effectively prevents damage and deterioration of the semiconductor device by blocking crack propagation, while also serving as a substrate contact and offering moisture absorption and stress relief, enhancing the device's durability and reliability.
Implementation Method 1
the crack propagation prevention structure includes an insulating liner covering opposing side surfaces of the channel layer and a portion of the upper surface of the substrate
Implementation Method 2
the metal liner is connected to the source electrode and the field dispersion layer
Data Source
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AI summary
Provided is a semiconductor device including a substrate, a channel layer on the substrate and having a first material, a barrier layer located on the channel layer and including a second material having an energy band gap different from that of the first material, a gate electrode located on the barrier layer and extending in a first direction, a gate semiconductor layer located between the barrier layer and the gate electrode, a source electrode connected to the channel layer and spaced apart from the gate electrode in a second direction perpendicular to the first direction, a drain electrode connected to the channel layer and spaced apart from the gate electrode in the second direction in the second direction, and a crack propagation prevention structure located on a side of the source electrode and connected to the source electrode, and penetrating through the channel layer and the barrier layer into the substrate.