Semiconductor Package Wiring Layout for Crack Redirection

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Solution Overview

Problem

Cracks in semiconductor packages often originate from etch-back openings in solder resist layers, leading to defects due to thermal stress and fracture of wiring layers.

Innovation Solution

Incorporation of dummy wirings with specific shapes and positions near etch-back openings to control the propagation of cracks by altering and redirecting their paths, thereby preventing widespread fracture.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If etch-back openings are provided in solder resist layer for wiring connections, then electrical connectivity is improved, but cracks propagate from openings into interior causing defects

Engineering Contradiction:

Improveelectrical connectivityVSAvoidcrack propagation

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A crack prevention structure is introduced as an intermediary element between the etch-back opening and the wiring layer. This structure acts as a barrier that intercepts and redirects cracks before they can propagate into the wiring layer, thereby maintaining electrical connectivity while preventing crack-induced defects.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention utilizes the natural propagation path of cracks and redirects them along a predetermined safe path through the crack prevention structure. By converting the harmful crack propagation into a controlled process that follows a predetermined trajectory, the wiring layer is protected while the opening maintains its electrical function.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Device complexity

If wiring layers are placed close to etch-back openings for compact design, then device complexity is reduced, but thermal stress causes fracture of wiring layers

Engineering Contradiction:

Improvelayout compactnessVSAvoidwiring layer integrity

Core Design Contradiction:

Device complexityVSStrength

Solution Approach 1:

The crack prevention structure serves as a protective intermediary between the etch-back opening and the wiring layer. It absorbs and redistributes thermal stress, preventing direct stress transmission to the wiring layer while allowing the compact layout to be maintained.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of manufacture

If crack propagation is allowed to occur naturally, then manufacturing process is simplified, but defects occur due to wiring layer fracture

Engineering Contradiction:

Improveprocess simplicityVSAvoiddefect rate

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The crack prevention structure is formed in advance during the manufacturing process, creating a predetermined crack path before the wiring layer is fully assembled. This preliminary action guides future crack propagation along a safe trajectory, preventing defects without requiring complex post-processing or inspection steps.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20250300092A1Semiconductor device

Publication Date: 2025.09.25 KIOXIA CORP

AI summary

In one embodiment, a semiconductor device includes a substrate including one or more wiring layers, a first insulator provided on an upper face of a first wiring layer that is an uppermost layer among the one or more wiring layers, and a second insulator provided on a lower face of a second wiring layer that is a lowermost layer among the one or more wiring layers. The device further includes a semiconductor chip provided on the substrate. The first or second wiring layer includes a first wiring and a second wiring that extend from an opening provided in the first or second insulator, and a third wiring that is provided at a position facing the opening between the first wiring and the second wiring.