Semiconductor Crack Sensor Layout for Wafer Dicing Damage
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Solution Overview
Problem
During the dicing process of semiconductor wafers, cracks can occur in semiconductor chips due to stress variations between layers, leading to malfunction or failure, and existing technologies lack effective methods for detecting these cracks in real-time.
Innovation Solution
A semiconductor device with a crack sensor system that includes conductive patterns and resistors connected in parallel, disposed in the scribe lane region, which detects cracks by measuring resistance changes as they propagate, allowing for early detection and assessment of crack severity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dicing is performed to separate wafers into semiconductor chips, then productivity is improved, but cracks may occur in the semiconductor chips due to stress variations between layers
Solution Approach 1:
The crack sensor is constructed in advance during the wafer fabrication process, before dicing occurs. The sensor includes conductive patterns and resistors that are预先 positioned to detect cracks that will occur during subsequent dicing operations, enabling early detection and assessment of crack severity
2Adaptability or versatility
If multiple layers are stacked to form semiconductor chips, then device functionality is improved, but stress variations between layers cause cracks during dicing
Solution Approach 1:
The crack sensor acts as an intermediary detection system between the multi-layer semiconductor structure and the external environment. It includes conductive patterns positioned at the bottom surface and top surface of the target layer, with resistors penetrating the target layer, to detect and report crack occurrences without directly interfering with the layered structure
3Ease of manufacture
If conventional dicing methods are used, then manufacturing cost is reduced, but crack detection capability is insufficient
Solution Approach 1:
The semiconductor wafer performs self-detection of cracks through the integrated crack sensor system. The sensor uses resistors connected in parallel that are disposed sequentially away from the chip region, allowing the structure itself to monitor for cracks and provide feedback on crack propagation without requiring external detection equipment
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crack sensor system effectively detects and monitors crack propagation, enabling timely intervention to prevent chip failure by measuring resistance changes across the resistors, providing a means to determine the extent of crack damage.
Implementation Method 1
a plurality of resistors substantially penetrating the target layer, the plurality of resistors connected in parallel to each other through the first conductive pattern and the second conductive pattern
Data Source
AI summary
A semiconductor device includes a target layer disposed on a substrate, and a crack sensor for detecting a crack generated in the target layer. The crack sensor includes a first conductive pattern positioned at a bottom surface of the target layer, a second conductive pattern positioned on a top surface of the target layer, the top surface being opposite to the bottom surface of the target layer, a plurality of resistors, and nodes. The plurality of resistors are connected in parallel to each other through the first conductive pattern and the second conductive pattern. Each of the plurality of resistors is disposed to substantially penetrate the target layer.