Semiconductor Device Crack Suppression via Slot Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor chips face issues with cracks and chipping during dicing due to nitride films, and existing solutions fail to simultaneously suppress cracks and maintain the flatness of the laminated structure on the uppermost layer.

Innovation Solution

A semiconductor device and manufacturing method that include a semiconductor substrate with a non-element region featuring top-layer metal wiring, a flattening film covering the metal wiring, and a protecting film, where a removed part is formed by removing the protecting film to create a level difference, thereby suppressing crack propagation and maintaining flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a nitride film is formed as a passivation film during dicing, then protection of the semiconductor wafer is improved, but cracks or chipping occur in the nitride film during cutting

Engineering Contradiction:
Improveprotection of semiconductor waferVSAvoidresistance to cracking during dicing
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent introduces slots that divide the continuous nitride film into segmented regions. These slots act as crack arrestors, preventing cracks from propagating across the entire wafer during dicing. The nitride film is maintained in regions between slots, providing localized protection while the slots prevent catastrophic failure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates different structural qualities in different regions: continuous nitride film in protected regions and discontinuous slots in cutting regions. This local variation allows the structure to provide protection where needed while accommodating the mechanical stresses of dicing through the slot regions.

Inventive Principle:
Principle #3Local quality

2Strength

If slots are formed in the dicing region to suppress crack propagation, then crack resistance is improved, but the flatness of the laminated structure on the uppermost layer is degraded

Engineering Contradiction:
Improvecrack resistanceVSAvoidflatness of uppermost layer
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent adds a vertical dimension to compensate for the horizontal discontinuities created by slots. By forming a flattening film that spans across the slot regions, the structure restores flatness in the vertical plane, enabling subsequent lithography and processing steps to proceed without interference despite the presence of slots.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The flattening film acts as an intermediary layer that bridges the gaps created by slots. This intermediate structure maintains the required flatness for uppermost layer processing while allowing the slots to perform their crack-arresting function at lower levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If a flattening film is formed to maintain flatness, then flatness of the laminated structure is improved, but the structure becomes more complex

Engineering Contradiction:
Improveflatness of laminated structureVSAvoidnumber of film layers
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The flattening film serves multiple functions simultaneously: it restores flatness degraded by slot formation, provides a uniform base for subsequent lithography patterns, and acts as a structural bridge across slot regions. This multi-functionality justifies the additional layer despite increased complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10411056B2Semiconductor device and manufacturing method of the same
Publication Date: 2019.09.10 RENESAS ELECTRONICS CORP
  • US10411056B2 patent drawing
  • US10411056B2 patent drawing
  • US10411056B2 patent drawing

AI summary

There are provided a highly reliable semiconductor device capable of suppressing occurrence of cracks as well as securing flatness and a manufacturing method therefor. The semiconductor device includes: a semiconductor substrate; an element region; and a non-element region. The non-element region includes: a top-layer metal wiring in a top layer of metal wirings formed in the non-element region; a flattening film covering an upper surface of the top-layer metal wiring; and a protecting film formed over the flattening film. A removed part where the protecting film is removed is formed in at least part of the non-element region.