Semiconductor Device Crystal Defect Switching Time

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Solution Overview

Problem

The formation of crystal defects in the inner portions of the second semiconductor region, configured under the first semiconductor region, makes it difficult to adequately decrease the switching time of semiconductor devices.

Innovation Solution

A semiconductor device is designed with a first semiconductor region surrounded by a plurality of crystal defects formed in the second semiconductor region, where the concentration of crystal defects in the side portions is lower than in the lower portions, facilitating recombination of charge carriers and reducing switching time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If crystal defects are formed in the inner portions of the second semiconductor region under the first semiconductor region, then the semiconductor device structure is simplified, but the switching time cannot be adequately decreased

Engineering Contradiction:
Improvestructure complexityVSAvoidswitching time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent applies local quality by creating different concentrations of crystal defects in different regions of the second semiconductor region. Specifically, a first concentration of crystal defects is formed in a first region (which may be under or adjacent to the first semiconductor region), while a second, higher concentration of crystal defects is formed in a second region (which is more laterally extended). This spatial variation in defect concentration allows the device to achieve both structural simplicity and reduced switching time, as the higher defect concentration in the second region provides additional recombination centers that reduce carrier lifetime and thus switching time.

Inventive Principle:
Principle #3Local quality

2Loss of time

If crystal defects are formed to reduce switching time, then the switching time decreases, but the tolerance level of surge voltage is reduced

Engineering Contradiction:
Improveswitching timeVSAvoidsurge voltage tolerance
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent resolves this contradiction by applying local quality through spatially differentiated crystal defect concentrations. The first region contains crystal defects at a first concentration that provides moderate recombination activity, while the second region contains crystal defects at a second concentration that is higher than the first. This gradient structure allows the device to achieve reduced switching time through the high-defect second region while the lower-defect first region maintains better surge voltage tolerance. The localized variation in defect density enables simultaneous optimization of both switching performance and voltage withstand capability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively decreases the switching time of semiconductor devices by managing recombination of charge carriers and improving the tolerance level of surge voltage, while reducing electrical resistance and leakage current.

Implementation Method 1

recombination of charge carriers (electrons and holes) may be occurred at those crystal defects 1013

Methodology Applied
Scientific EffectCharge carrier recombination:

Data Source

PatentUS10186586B1Semiconductor device and method for forming the semiconductor device
Publication Date: 2019.01.22 SANKEN ELECTRIC CO LTD
  • US10186586B1 patent drawing
  • US10186586B1 patent drawing
  • US10186586B1 patent drawing

AI summary

A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes a first semiconductor region having a first conductivity type; and a second semiconductor region having a second conductivity type. The first semiconductor region is configured within the second semiconductor region and a plurality of crystal defects are formed in the second semiconductor region and at least part of the first semiconductor region is surrounded by the plurality of crystal defects. Therefore, recombination of charge carriers (electrons and holes) on a lateral direction and a longitudinal direction could be taken into account, and the switching time of the semiconductor device could be adequately decreased.