Semiconductor Layer Structure With CSC Overlap for RBSOA Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices, such as IGBTs, experience variations in junction depth and concentration between the base layer and carrier stored layer, leading to reduced reverse bias safe operating area (RBSOA) and breakdown tolerance.
Innovation Solution
Incorporation of a p-type carrier storage control (CSC) layer in the semiconductor device, designed to overlap with the base and carrier stored layers, stabilizing the junctions by controlling impurity concentration profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If impurity peak concentration of the p-type base layer and n-type carrier stored layer is stabilized, then threshold voltage variation is reduced, but junction depth and concentration variation between base layer and carrier stored layer occurs
Solution Approach 1:
A CSC layer is introduced as an intermediary between the base layer and carrier stored layer. This layer mediates the interaction between the two layers by providing a controlled impurity concentration profile that prevents direct junction variations, thereby resolving the contradiction between threshold voltage stability and junction precision
2Ease of operation
If impurity concentration is low in junction regions, then current can be cut off, but breakdown tolerance is lowered
Solution Approach 1:
The CSC layer implements local quality by having different impurity concentration characteristics in different regions. The layer provides low impurity concentration at the junction interface for current cutoff while maintaining higher breakdown tolerance in other regions through its specific concentration profile
Data Source
AI summary
A semiconductor device includes a source layer of a first conductivity type located in a surface portion of a semiconductor layer and defined by a concentration profile of a first impurity, a base layer of a second conductivity type located on a lower side of the source layer and defined by a concentration profile of a second impurity, a carrier stored layer of the first conductivity type located on a lower side of the base layer and defined by a concentration profile of a third impurity, a drift layer of the first conductivity type located on a lower side of the carrier stored layer, and a CSC layer of the second conductivity type defined by a concentration profile of a fourth impurity. A region containing the fourth impurity includes a region where a region containing the second impurity and a region containing the third impurity overlap each other.