Semiconductor Device Current Measurement Layout

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Solution Overview

Problem

Existing semiconductor devices face challenges in accurately measuring current in power conversion circuits, leading to erroneous operation and reduced efficiency due to noise interference and long measurement paths.

Innovation Solution

The semiconductor device incorporates a specific layout of power semiconductor chips and a resistive component, with the resistive component embedded within the device to minimize measurement paths and reduce noise interference, using a shunt resistor to detect current and improve measurement accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If current measurement is performed using existing semiconductor device layouts, then the device can operate, but measurement accuracy deteriorates due to noise interference and long measurement paths

Engineering Contradiction:
Improvecurrent measurement accuracyVSAvoidnoise interference
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent repositions the resistive component from a conventional location to a position adjacent to the power transistor within the same semiconductor substrate. This spatial reconfiguration in the planar dimension reduces the current measurement path length and minimizes exposure to noise interference, thereby improving measurement accuracy without adding external components

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If current measurement path is extended to accommodate existing component layouts, then component placement is simplified, but measurement accuracy deteriorates due to increased noise susceptibility

Engineering Contradiction:
Improvecomponent placementVSAvoidcurrent measurement accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent merges the resistive component and the power transistor into a closely integrated structure on the same semiconductor substrate. This consolidation reduces the distance between measurement and power components, minimizing noise interference while maintaining ease of manufacture through standard semiconductor fabrication processes

Inventive Principle:
Principle #5Merging (Combining)

3Temperature

If resistive component is placed远离 power transistor, then heat interference is reduced, but measurement path length increases causing noise interference

Engineering Contradiction:
Improveheat interferenceVSAvoidnoise interference
Core Design Contradiction:
TemperatureVSObject-affected harmful factors

Solution Approach 1:

The patent segments the semiconductor device into distinct functional regions: the power transistor region, the resistive component region adjacent to it for current measurement, and separate control circuit regions. This spatial segmentation allows the resistive component to be positioned close to the power transistor for accurate measurement while the overall device layout manages heat dissipation through dedicated thermal pathways and spacing in other areas

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances current measurement accuracy, reduces noise influence, and prevents erroneous feedback control, thereby improving the operational efficiency and reliability of the power conversion circuit.

Implementation Method 1

a resistive component electrically coupled to the foregoing second power transistors... the value of a current flowing in the power conversion circuit or the like is measured

Methodology Applied
Scientific EffectOhm's Law: Ohm's Law

Data Source

PatentUS10573604B2Semiconductor device
Publication Date: 2020.02.25 RENESAS ELECTRONICS CORP
  • US10573604B2 patent drawing
  • US10573604B2 patent drawing
  • US10573604B2 patent drawing

AI summary

A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first long side, a second side, a third short side, and a fourth short side. In a Y-direction, each of the first and second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.