Semiconductor Current Sampler and Start-Up Structure Integration
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Solution Overview
Problem
Traditional AC-DC switching power supply integrated chips face challenges in achieving high efficiency and low production cost, with existing current sampling and start-up structures leading to significant energy loss and increased production costs.
Innovation Solution
A semiconductor device with a current sampler and start-up structure comprising high voltage transistors and a resistor, where the first transistor acts as a power switch, the second transistor as a current sampler, and the third transistor and resistor form a start-up structure, integrated into a single silicon chip, reducing energy loss and production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional current sampling and start-up structures are used in AC-DC switching power supply integrated chips, then the chip can be manufactured with conventional processes, but significant energy loss occurs and production cost increases
Solution Approach 1:
The patent combines the current sampling function and start-up function into a single integrated circuit structure. The current sampling transistor Q1 and start-up transistor Q2 share common circuit elements and are fabricated using the same high-voltage process region, eliminating the need for separate discrete components and reducing overall system complexity while maintaining low energy loss.
2Reliability
If multiple separate components are used for power switch, current sampler, and start-up structure, then each component can be optimized independently, but production cost increases and chip area expands
Solution Approach 1:
The power switch transistor Q3, current sampling transistor Q1, and start-up transistor Q2 are integrated into a single chip using the same high-voltage process region. This consolidation reduces the total chip area required while maintaining the reliability of each component through optimized circuit design and shared fabrication processes.
Solution Approach 2:
The patent utilizes the vertical dimension of the chip by implementing a multi-layer transistor structure where Q1, Q2, and Q3 are stacked or arranged in different layers. This three-dimensional integration approach reduces the horizontal chip area while preserving the functional independence and reliability of each transistor.
3Loss of energy
If high voltage transistors are used for current sampling and start-up functions, then energy loss is reduced, but the voltage withstand region requirements increase the chip area
Solution Approach 1:
The patent combines the voltage withstand regions of Q1, Q2, and Q3 into a shared high-voltage region on the chip. By consolidating these regions rather than providing separate isolation areas for each transistor, the total area required for voltage withstand is reduced while maintaining the low energy loss characteristics of high-voltage operation.
Data Source
AI summary
A semiconductor device with a current sampler and a start-up structure, comprises first, second and third high-voltage transistors, and a resistor, wherein: a drain terminal of the first transistor is respectively connected to a drain terminal of the second transistor, a drain terminal of the third transistor and one end of the resistor; a source terminal of the first transistor is grounded, and a gate terminal of the first transistor is connected to a gate terminal of the second transistor; the other end of the resistor is connected to a gate terminal of the third transistor; wherein the resistor is wound and formed in a common voltage withstand region of the first transistor, the second transistor and the third transistor, or in a voltage withstand region of the first transistor only, or in the voltage withstand region of the third transistor only.


