Semiconductor Cutting Adhesive Mounting for Dice Position Accuracy
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Solution Overview
Problem
Conventional semiconductor cutting and testing processes result in position offsets of semiconductor dice after cutting, leading to reduced work efficiency and unit per hour (UPH) due to increased gaps between dice, making it difficult to simultaneously test multiple units.
Innovation Solution
Attaching semiconductor elements to a carrier using an adhesive layer, ensuring the adhesive layer is sandwiched between the semiconductor element and the carrier, and cutting along predefined lines to maintain consistent pitches between units, thereby minimizing position offsets and facilitating efficient testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the wafer is directly placed in a device for a probe test before cutting, then multiple dice in multiple unit regions can be tested simultaneously, but work defects after cutting cannot be detected
Solution Approach 1:
The patent applies preliminary action by performing the cutting process before the probe test. The wafer is cut into individual dice and mounted on a carrier tape, then tested. This sequence allows detection of work defects that occur during cutting, which would be impossible if testing were performed before cutting.
2Ease of manufacture
If the wafer is placed on a cut tape after cutting, then separated dice are formed, but position offsets occur and gaps between dice increase
Solution Approach 1:
The patent applies parameter changes by modifying the mechanical constraints during the cutting and mounting process. By using a carrier tape with specific structural parameters and controlling the mounting parameters, the patent maintains consistent pitch between dice while allowing them to be separated and tested individually.
3Stability of the object's composition
If the circumference of the cut tape is fixed by an annular film frame, then the tape structure is stable, but offset amounts accumulate and become larger for peripheral dice
Solution Approach 1:
The patent applies the taking out principle by removing the annular film frame constraint that causes cumulative offsets. Instead of fixing the entire circumference, the patent allows the tape to be handled and mounted in a way that eliminates the frame-induced positioning errors, particularly for peripheral dice.
4Productivity
If the probe head tests a fixed number of dice simultaneously before cutting, then testing efficiency is high, but the same number cannot be tested after cutting due to offset amounts
Solution Approach 1:
The patent applies preliminary action by performing cutting and mounting before testing, which establishes consistent positioning that enables the probe head to test the same number of dice simultaneously both before and after cutting, maintaining both productivity and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains consistent pitches between semiconductor units post-cutting, allowing for simultaneous testing of the same number of units before and after cutting, enhancing test table efficiency and reducing defects, thereby improving yield and reducing the need for specialized testing equipment.
Implementation Method 1
attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier
Data Source
AI summary
The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.