Semiconductor Arrangement With Cyclic Etching And Flashing
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Solution Overview
Problem
In semiconductor fabrication, high aspect ratio structures like fins are challenging to etch without damaging adjacent dielectric layers, as existing etching processes can lead to unwanted removal of dielectric materials and accumulation of byproducts, which can alter the structure's aspect ratio and functionality.
Innovation Solution
A cyclic etching process combined with flashing operations is employed, where a protective layer is formed on the dielectric surfaces to prevent byproduct accumulation and inhibit dielectric layer removal, allowing for deepening of trenches around semiconductive structures while maintaining the dielectric layer's upper surface elevation, thereby protecting the structure from lateral etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional etching process is used to deepen trenches around high aspect ratio structures, then the trench depth increases, but the adjacent dielectric layer is damaged due to lateral etching and byproduct accumulation
Solution Approach 1:
A protective layer is introduced as an intermediary between the etchant and the dielectric layer. This protective layer selectively prevents the etchant from laterally attacking the dielectric material while allowing the etching process to proceed vertically to deepen the trench. The protective layer is removed after etching to reveal the deepened trench with intact dielectric layers.
Solution Approach 2:
The protective layer is formed on the dielectric layer surfaces before the etching process begins. This preliminary protective coating prevents byproduct accumulation and lateral etching damage during the subsequent deep trench etching operation, ensuring the dielectric layer remains intact while achieving the desired trench depth.
2Length of moving object
If etching process is performed to remove semiconductive structure portions, then the trench is deepened, but byproducts accumulate and alter the structure's aspect ratio
Solution Approach 1:
The protective layer acts as a barrier that prevents etchant contact with the dielectric layer surfaces, thereby preventing byproduct accumulation in critical areas. This maintains precise control over the aspect ratio of high aspect ratio structures during the deep trench etching process.
Solution Approach 2:
The protective layer is selectively formed only on specific dielectric layer surfaces that are adjacent to the trenches being etched. This localized protection ensures that byproduct accumulation is prevented only where it would affect aspect ratio control, while allowing the etching process to proceed elsewhere.
3Reliability
If photoresist or hard mask is used to protect dielectric layers, then lateral etching is prevented, but the process complexity increases and productivity decreases
Solution Approach 1:
The protective layer is formed in-situ during the etching process itself, utilizing the etching conditions to generate the protective coating on the dielectric layer surfaces. This eliminates the need for separate photoresist coating and hard mask formation steps, thereby maintaining high productivity while ensuring reliable dielectric layer protection.
Solution Approach 2:
The protective layer formation is merged with the etching process, combining two functions (protection and etching) into a single integrated operation. This reduces the total number of process steps compared to using separate photoresist and hard mask layers, thereby improving fabrication efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively deepens trenches around high aspect ratio semiconductive structures without compromising the adjacent dielectric layer, ensuring the structural integrity and operational efficiency of vertical transistors by preventing unwanted removal of dielectric materials and maintaining the desired aspect ratio.
Implementation Method 1
Etching is a process where an etchant, such as a chemical, is applied to a layer or a portion of the layer that is to be removed
Implementation Method 2
a protective layer is formed on the dielectric surfaces to prevent byproduct accumulation and inhibit dielectric layer removal
Implementation Method 3
A recess or trench defined by sidewalls of the dielectric layer and a top surface of the semiconductive structure is deepened during the cyclical etching process
Data Source
AI summary
A method for fabricating a semiconductor arrangement includes performing a first etching of a semiconductive structure to expose a first portion of a sidewall of a first layer adjacent the semiconductive structure. The first etching forms a first protective layer on the first portion of the sidewall of the first layer, and the first protective layer is formed from a first accumulation of by-product material formed from an etchant of the first etching interacting with the semiconductive structure. The method includes performing a first flash to remove at least some of the first protective layer.