Semiconductor Decoupling Capacitor Noise Filtering and Stress Reduction

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Solution Overview

Problem

As integration density of semiconductor devices increases, fluctuation noise occurs in power and ground voltages during operations, which existing technologies fail to adequately address, particularly in high-capacity and high-speed devices.

Innovation Solution

Incorporating a decoupling capacitor on the substrate with a first solder bump vertically overlapping and covering a portion of the passivation layer, and a second solder bump offset from the decoupling capacitor, where the first solder bump has a greater width than the second, to filter noise and reduce stress on the capacitor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a decoupling capacitor is added to filter noise in power and ground voltages, then noise filtering capability is improved, but device complexity increases

Engineering Contradiction:

Improvenoise filtering capabilityVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The decoupling capacitor structure is merged with the solder bump structure. The capacitor is positioned directly beneath the solder bump, allowing the solder bump to serve dual purposes: electrical connection and mechanical support for the capacitor. This integration reduces the number of separate components and simplifies the overall device structure while maintaining effective noise filtering capability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The solder bump is designed to perform multiple functions: it provides electrical connection between the semiconductor device and external circuitry, and simultaneously serves as a mechanical support structure and protective cover for the decoupling capacitor. This multi-functionality reduces the need for additional structural elements, thereby reducing device complexity while maintaining reliability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If integration density is increased to achieve high-capacity and high-speed devices, then productivity is improved, but fluctuation noise in power and ground voltages increases

Engineering Contradiction:

Improveintegration densityVSAvoidfluctuation noise

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

Decoupling capacitors are strategically positioned at specific locations within the semiconductor device, particularly beneath solder bumps that connect to power and ground terminals. This localized placement ensures that noise filtering is applied precisely where voltage fluctuations occur most intensely, enabling high integration density while effectively managing noise in critical areas.

Inventive Principle:

Principle #3Local quality

3Reliability

If a solder bump is positioned to vertically overlap with the decoupling capacitor, then connection reliability is improved, but stress on the capacitor increases

Engineering Contradiction:

Improveconnection reliabilityVSAvoidstress on capacitor

Core Design Contradiction:

ReliabilityVSStress or pressure

Solution Approach 1:

The solder bump is designed with an asymmetric width configuration relative to the decoupling capacitor. The solder bump has a first width when viewed from the front and a second width when viewed from the side, with the second width being greater than the first. This asymmetric design allows the solder bump to cover a portion of the capacitor's top surface, distributing mechanical stress more evenly across the capacitor structure while maintaining reliable electrical connection.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The decoupling capacitor is positioned directly beneath the solder bump before final assembly, creating a cushioning effect. The capacitor's presence beneath the solder bump provides mechanical support and stress distribution, protecting the underlying semiconductor structure from excessive stress while maintaining connection reliability.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively filters noise in operating voltages, improving stability and reducing stress on the decoupling capacitor, thereby enhancing the performance of high-speed semiconductor devices.

Implementation Method 1

a power decoupling capacitor for filtering noise existing in operating voltages such as the power voltage and the ground voltage

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 2

a first solder bump disposed on the first connection pad and covering a portion of a top surface of the passivation layer

Methodology Applied

Scientific EffectStress distribution:

Implementation Method 3

fluctuation noise may occur in a power voltage and a ground voltage during a read operation and a write operation... filtering noise existing in operating voltages

Methodology Applied

Scientific EffectNoise filtering: Filter (electronic)

Data Source

PatentUS9960112B2Semiconductor device

Publication Date: 2018.05.01 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device comprising: a substrate; a decoupling capacitor disposed on the substrate; a first connection pad vertically overlapping with the decoupling capacitor; a passivation layer exposing a portion of the first connection pad; and a first solder bump disposed on the first connection pad and covering a portion of a top surface of the passivation layer.