Semiconductor Defect Detection Circuit for Crack Identification
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Solution Overview
Problem
Semiconductor chips face electrical operation failures and reliability issues due to defects such as cracks or chips, necessitating accurate defect detection to prevent failures.
Innovation Solution
Incorporation of defect detection circuits within semiconductor chips, including a gate pattern, wiring structures, and contact plugs, which utilize clock signal circuits and buffer circuits to detect cracks in the gate patterns and wiring structures, allowing for precise identification of defects before packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If defect detection circuits are added to semiconductor chips, then measurement precision of defects is improved, but device complexity increases
Solution Approach 1:
The defect detection function is segmented into separate dedicated circuits (first defect detection circuit for gate pattern, second defect detection circuit for wiring structure) rather than using a single general-purpose detection system. This allows each circuit to be optimized for its specific detection target while maintaining overall system manageability.
Solution Approach 2:
Test signal input pads and test signal output pads serve as intermediary interfaces between external testing equipment and the internal defect detection circuits. These pads enable external control and readout without requiring direct access to the complex internal circuit structures.
2Reliability
If multiple defect detection circuits are incorporated, then reliability of defect detection is improved, but manufacturing precision requirements increase
Solution Approach 1:
The detection system is divided into multiple independent detection circuits that can be manufactured and tested separately. Each circuit targets a specific structure (gate pattern or wiring), allowing for specialized manufacturing processes and easier quality control for each segment.
Solution Approach 2:
The defect detection circuits are integrated into the semiconductor chip before the final packaging process. This preliminary integration allows defects to be detected early in the manufacturing sequence, enabling corrective actions before subsequent manufacturing steps that would be more difficult or expensive to modify.
3Reliability
If defect detection is performed before packaging, then reliability of semiconductor chip is improved, but loss of time in manufacturing process increases
Solution Approach 1:
The defect detection function is built into the chip structure during the manufacturing process itself, rather than requiring separate post-packaging testing. This preliminary integration of detection capability allows for in-line quality assurance that does not add significant time to the overall manufacturing flow.
Solution Approach 2:
The defect detection circuits are merged with the functional circuits of the semiconductor chip, sharing common manufacturing steps and test infrastructure. This combination eliminates the need for separate detection equipment and processes, thereby reducing overall manufacturing time while maintaining high reliability.
Data Source
AI summary
A semiconductor chip includes: a gate pattern on a substrate; an interlayer insulation layer on the gate pattern; a first wiring structure on the interlayer insulation layer; and a defect detection circuit electrically connected to the gate pattern and the first wiring structure. The first wiring structure is electrically connected to the gate pattern via a contact plug through the interlayer insulation layer. The defect detection circuit is electrically connected to the gate pattern and the first wiring structure, and the defect detection circuit is configured to detect defects in the first wiring structure and at least one of the gate pattern and the substrate.