Semiconductor Defect Selection via Hot Spot Matching
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Solution Overview
Problem
Existing methods for detecting systematic defects in semiconductor wafers, particularly those due to exposure processes and mask factors, struggle to distinguish between systematic and non-systematic defects, and fail to exhaustively identify hot spots and defects caused by wafer topography, leading to inefficiencies in defect detection and review.
Innovation Solution
A reviewed defect selection processing method that uses a combination of visual inspection data, lithography simulation, and pattern layout analysis to classify and match detected defects with simulated hot spots, enabling the detection of both expected and unexpected systematic defects, as well as defects caused by wafer topography through grouping and distribution analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If highly-sensitive visual inspection is performed to detect systematic defects, then detection sensitivity is improved, but the number of detected defects including foreign substances and nuisance defects increases
Solution Approach 1:
The patent extracts and separates systematic defects from non-systematic defects by introducing the concept of hot spots and using pattern layout analysis. The selection processing unit extracts reviewed defects that are likely to be systematic defects from the large set of all detected defects, effectively separating the signal (systematic defects) from the noise (foreign substances, nuisance defects).
Solution Approach 2:
The patent performs preliminary action by calculating hot spots based on pattern layout data before defect review. The hot spot calculation unit pre-identifies regions where systematic defects are likely to occur based on exposure process simulations and pattern characteristics, allowing the selection processing unit to focus review efforts on these predetermined high-probability areas.
2Quantity of substance
If reviewed defects are sampled from all detected defects without discrimination, then review coverage is improved, but the ability to identify systematic defects deteriorates
Solution Approach 1:
The patent applies local quality by treating different regions of the wafer differently based on their hot spot characteristics. Instead of uniform sampling across all detected defects, the selection processing unit applies different selection criteria and weights to defects located in different hot spot regions, focusing review resources on areas with higher systematic defect probability while maintaining adequate coverage.
3Device complexity
If conventional defect sampling methods are used without hot spot analysis, then processing simplicity is maintained, but exhaustive detection of systematic defects deteriorates
Solution Approach 1:
The patent performs preliminary action by calculating hot spots based on pattern layout data before defect review. The hot spot calculation unit pre-identifies regions where systematic defects are likely to occur based on exposure process simulations and pattern characteristics, allowing the selection processing unit to focus review efforts on these predetermined high-probability areas.
Solution Approach 2:
The patent introduces hot spots as an intermediary concept that bridges pattern layout analysis and defect review. The hot spot calculation unit acts as an intermediary that translates pattern layout data into spatial regions of high systematic defect probability, which then guide the defect selection process without requiring direct complex analysis of each defect.
4Ease of operation
If uniform defect sampling is performed across the wafer, then sampling fairness is maintained, but detection of unevenly distributed systematic defects deteriorates
Solution Approach 1:
The patent applies local quality by treating different regions of the wafer differently based on their hot spot characteristics. Instead of uniform sampling across all detected defects, the selection processing unit applies different selection criteria and weights to defects located in different hot spot regions, focusing review resources on areas with higher systematic defect probability while maintaining adequate coverage.
Data Source
AI summary
The present invention relates to semiconductor inspection and provides a technology capable of efficiently detecting a systematic defect. In the present system, with regard to the process (S7, S8) of matching hot spot (HS) points that can be simulated in advance and defect points obtained as a result of a visual inspection each other and the unmatched defect points, a process (S6, S9) of classifying the defect points into groups based on similarity of pattern layout at the defect points to determine the defects belonging to a pattern layout where defects frequently occur, thereby reliably detecting the systematic defect. Also, with a process (S11) of acquiring an uneven distribution in a defect occurrence distribution on a wafer, the systematic defect occurring due to topography of the wafer can also be detected.


