Semiconductor Defect Inspection Using SEM Hot Spot Analysis

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Solution Overview

Problem

Current semiconductor device defect inspection methods fail to accurately evaluate the frequency of systematic defects at hot spots due to low resolution images and coordinate system errors, making it difficult to specify circuit shapes and determine defect occurrence frequencies reliably.

Innovation Solution

A semiconductor device defect inspection method using high-resolution SEM imaging with a step-and-repeat procedure, where pre-specified inspection points are selected and imaged, and defect ratios are calculated with confidence intervals compared to reference values to identify defect types exceeding threshold values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Difficulty of detecting and measuring

If optical appearance inspection or SEM appearance inspection device scans the wafer surface to detect systematic defects, then defect detection capability is improved, but measurement precision deteriorates due to low resolution images and coordinate system errors

Engineering Contradiction:
Improvedefect detection capabilityVSAvoidmeasurement precision
Core Design Contradiction:
Difficulty of detecting and measuringVSMeasurement precision

Solution Approach 1:

The inspection process is divided into two distinct stages: (1) a scanning inspection stage using optical or SEM appearance inspection to detect defect positions across the wafer surface, and (2) a high-precision verification stage using high-resolution SEM to accurately measure and classify defects at specified inspection points. This segmentation allows each stage to perform its specialized function optimally without compromise

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary defect detection through scanning inspection to identify candidate defect positions, then uses this information to pre-specify inspection points for high-resolution SEM verification. This preliminary action enables the high-precision measurement stage to focus only on relevant areas, improving both efficiency and accuracy

Inventive Principle:
Principle #10Preliminary action

2Difficulty of detecting and measuring

If the entire wafer surface is scanned to detect systematic defects, then defect detection coverage is improved, but productivity deteriorates due to time-consuming full surface inspection

Engineering Contradiction:
Improvedefect detection coverageVSAvoidproductivity
Core Design Contradiction:
Difficulty of detecting and measuringVSProductivity

Solution Approach 1:

The patent extracts only the essential information (defect positions and types) from the full wafer surface scanning, then uses this extracted data to specify a reduced set of inspection points for high-resolution SEM verification. This extraction approach maintains comprehensive defect detection coverage while significantly reducing the time required for detailed inspection

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs a complete scan of the wafer surface to detect all potential defects, then performs high-resolution inspection only on a partial set of specified inspection points based on the scan results. This partial action approach ensures comprehensive detection coverage while improving productivity by avoiding excessive full-surface high-resolution inspection

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If coordinate system alignment between inspection device and design data is performed to specify circuit shapes, then defect classification accuracy is improved, but device complexity increases due to coordinate transformation requirements

Engineering Contradiction:
Improvedefect classification accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces design data as an intermediary reference that bridges the inspection device coordinate system and the circuit pattern coordinate system. By aligning inspection points with design data patterns, the system achieves accurate defect classification without requiring complex direct coordinate transformations between inspection devices

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9153020B2Semiconductor device defect inspection method and system thereof
Publication Date: 2015.10.06 HITACHI HIGH TECH CORP
  • US9153020B2 patent drawing
  • US9153020B2 patent drawing
  • US9153020B2 patent drawing

AI summary

Provided are a semiconductor device defect inspection method and system thereof, with which predetermined hot spots are inspected using a SEM, and with which the frequency of defects occurring at the hot spot is estimated statistically and with reliability. An inspection point is designated in design data by the defect type. A plurality of pre-designated inspection points is selected by the defect type from the designated inspection points. The plurality of pre-designated inspection points by defect type thus selected are image captured by the inspection points. A defect ratio, which is a ratio of the plural inspection points which are image captured by the defect type to the plural defects detected, and a reliability interval of the defect ratio which is computed by the defect type is compared with a preset reference value. A defect type having a defect occurrence ratio which exceeds the reference value is derived.