Semiconductor Defect Matching for False Alarm Suppression
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Solution Overview
Problem
Conventional defect detection methods in semiconductor fabrication face challenges in accurately identifying defects due to process variations and false alarms, especially with shrinking feature dimensions, leading to degraded detection performance.
Innovation Solution
A computerized system employing template matching or machine learning-based methods to detect defects of interest (DOIs) by using template patches and trained machine learning models to analyze semiconductor specimens, reducing false alarms and improving sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional defect detection methods are used, then detection speed is maintained, but detection accuracy and sensitivity degrade due to process variations and false alarms
Solution Approach 1:
The patent segments the defect detection process into multiple specialized modules: a defect detection module that identifies potential defects, a template matching module that compares detected regions against reference templates, and a machine learning classification module that determines defect types. This segmentation allows each module to specialize in specific tasks, improving overall detection accuracy while reducing false alarms through progressive filtering and verification
Solution Approach 2:
The patent introduces template patches and machine learning models as intermediary elements between raw inspection images and final defect classification. These intermediaries serve as reference standards and intelligent classifiers that bridge the gap between simple image capture and accurate defect identification, enabling the system to distinguish true defects from process variations and noise
2Productivity
If feature dimensions are shrunk for higher density, then device performance improves, but defect detection difficulty increases
Solution Approach 1:
The patent performs preliminary defect detection at an earlier stage in the fabrication process, before features are fully shrunk and defects become更难 to detect. By implementing inspection points at strategic moments during manufacturing, the system can identify defects when they are more prominent and easier to distinguish from process variations, maintaining detection effectiveness even as feature dimensions decrease
Solution Approach 2:
The patent applies local quality analysis by examining specific regions of interest in detail rather than treating the entire wafer uniformly. The system identifies areas with abnormal characteristics and applies enhanced analysis techniques specifically to those regions, allowing for accurate defect detection in shrunk features while maintaining efficient processing of normal areas
3Productivity
If automated examination is implemented, then productivity increases, but system complexity increases
Solution Approach 1:
The patent implements a multi-functional automated examination system where a single integrated platform performs defect detection, template matching, machine learning classification, and defect classification tasks. This universal system handles multiple examination functions through modular components that can work together or independently, increasing productivity while managing complexity through functional integration and reuse
Data Source
AI summary
There is provided a system and method of defect detection on a semiconductor specimen based on template matching or machine learning (ML). Template matching is performed between a set of template patches and a set of runtime images, by selectively performing at least two of the following: matching a defect template patch in an inspection image, matching a reference template patch in a reference image, or matching a difference template patch in a difference image, so as to provide likelihood of target of interest (TOI) presence in the inspection image. The ML-based approach includes feeding an inspection patch and a reference patch together to a trained ML model, to generate a feature vector representative of a given TOI candidate, and evaluating the feature vector of the given TOI candidate to provide a likelihood of the given TOI candidate being a TOI or non-TOI.