Semiconductor Device Defect Relief Circuit

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Solution Overview

Problem

As semiconductor devices increase in storage capacity due to miniaturization, the risk of defective memory cells also rises, and existing technologies struggle to efficiently relieve these defects using redundancy circuits.

Innovation Solution

A semiconductor device incorporating an address serial conversion circuit, a bit determination circuit, and a selection control circuit that serially converts defective address signals, counts high-level bits, and selects antifuse elements for programming based on a predetermined threshold, optimizing the programming process to reduce wasteful programming and efficiently relieve defective memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the storage capacity is increased by miniaturizing memory cells, then the storage capacity increases, but the risk of defective memory cells increases

Engineering Contradiction:
Improvestorage capacityVSAvoiddefect rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent performs preliminary detection of defective memory cells during manufacturing testing, and pre-configures redundancy circuits with replacement addresses stored in antifuse elements before the device reaches the customer. This allows defects to be identified and corrected in advance, enabling high-capacity miniaturized memory devices to maintain reliability through pre-established backup mechanisms.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conventional redundancy methods are used to relieve defective memory cells, then defective cells can be replaced, but the programming process is inefficient with wasteful programming

Engineering Contradiction:
Improvedefect relief capabilityVSAvoidprogramming efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by treating different defective addresses differently based on their binary characteristics. The bit determination circuit identifies which bits in the defective address are at high logic level, and the selection control circuit selectively programs antifuse elements only for those specific bits rather than uniformly programming all redundancy circuits. This localized approach eliminates wasteful programming of already-functional cells.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the programming parameter from a uniform approach (programming all redundancy circuits regardless of actual need) to a selective approach based on the binary value of defective address bits. By using the bit determination result signal to control which antifuse elements are programmed, the system dynamically adjusts programming behavior based on the specific characteristics of each defective address, significantly improving programming efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10074442B2Semiconductor device and control method of the same
Publication Date: 2018.09.11 MICRON TECHNOLOGY INC
  • US10074442B2 patent drawing
  • US10074442B2 patent drawing
  • US10074442B2 patent drawing

AI summary

A semiconductor device comprises a bit determination circuit to count the number of bits at a first level in an input address signal formed of a plurality of bits and to output a result indicating whether or not a value of the count exceeds a predetermined determination threshold value, as a bit determination result signal, and a selection control circuit to select a non-volatile program element to be cut off, based on the bit determination result signal and the address signal. Additional apparatus and methods are described.