Semiconductor Structure With Depletion Layer Between Active Regions

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Solution Overview

Problem

Semiconductor devices with buried-channel array transistors suffer from low driving current and high threshold voltage sensitivity due to the short channel effect, affecting their performance and stability.

Innovation Solution

A semiconductor structure is formed with a depletion layer between two active regions, each with different dopant concentrations, and gate structures are created in trenches within these regions, along with a gate dielectric layer to enhance performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a buried-channel array transistor (BCAT) device is used to deal with short channel effect, then the short channel effect is improved, but the driving current decreases and threshold voltage sensitivity increases

Engineering Contradiction:

Improveshort channel effect controlVSAvoiddriving current

Core Design Contradiction:

ReliabilityVSPower

Solution Approach 1:

The transistor channel is divided into two separate substrates (first semiconductor substrate and second semiconductor substrate) with a depletion layer between them. This segmentation allows the channel to be split into first and second active regions that can be independently controlled, resolving the contradiction between short channel effect control and driving current by enabling separate optimization of each region's electrical characteristics

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A depletion layer is introduced as an intermediary between the first and second active regions. This depletion layer acts as a mediator that controls the electrical interaction between the two substrates, allowing improved short channel effect control while maintaining adequate driving current through proper depletion layer thickness and doping concentration control

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a buried-channel array transistor (BCAT) device is used to deal with short channel effect, then the short channel effect is improved, but the threshold voltage sensitivity increases

Engineering Contradiction:

Improveshort channel effect controlVSAvoidthreshold voltage sensitivity

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The channel is segmented into two independent substrates with different dopant concentrations, allowing the threshold voltage to be controlled by adjusting the doping profile in each region separately. This segmentation reduces threshold voltage sensitivity by distributing the voltage control across two regions rather than one

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different dopant concentrations are applied to different regions (first active region vs. second active region), creating local quality variations that optimize the electrical characteristics. The first substrate and second substrate have different doping profiles, allowing localized control of threshold voltage and reducing overall sensitivity

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves driving current and reduces threshold voltage sensitivity, leading to enhanced performance and stability of the semiconductor structure.

Implementation Method 1

A depletion layer is formed on a first semiconductor substrate

Methodology Applied

Scientific EffectDepletion layer:

Implementation Method 2

The first semiconductor substrate and the second semiconductor substrate are doped to respectively form a first active region and a second active region

Methodology Applied

Scientific EffectDoping: Dopants

Data Source

PatentUS11502075B2Method of forming semiconductor structure

Publication Date: 2022.11.15 NAN YA TECH

AI summary

A semiconductor structure includes a first semiconductor substrate, a second semiconductor substrate, a depletion layer, an isolation structure, a first gate structure, and a second gate structure. The first and second semiconductor substrates respectively have a first active region and a second active region overlapping the first active region. The depletion layer is disposed between the first active region and the second active region. The isolation structure surrounds the first and second active regions. The first gate structure is disposed in the second active region. The second gate structure is disposed in the second active region. The second active region has a portion between the first gate structure and the second gate structure.