Semiconductor Detector Fluorine Doping for Higher Vth, Lower Dark Current
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Solution Overview
Problem
Conventional silicon drift detectors face challenges in adjusting the operating voltage without increasing dark current, as additional doping for voltage adjustment leads to increased crystal defects and steep pn junctions, affecting EDS characteristics.
Innovation Solution
Incorporating fluorine into the P-type semiconductor region, with the highest concentration of fluorine closer to the surface than boron, allows for threshold voltage adjustment while minimizing dark current by offsetting boron's carrier effect and reducing crystal defects, and using a concentration-decreasing profile for fluorine distribution to maintain shallow pn junctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phosphorus or arsenic is additionally implanted as a counter to adjust the operating voltage, then the threshold voltage is increased, but the dark current increases due to increased crystal defects and steep pn junction
Solution Approach 1:
The patent changes the dopant type from conventional P/As to fluorine (F), and modifies the concentration profile by positioning the highest F concentration closer to the surface than the highest B concentration. This parameter change allows voltage adjustment while maintaining a shallower pn junction and reducing crystal defects, thereby suppressing dark current
Solution Approach 2:
The patent creates a non-uniform fluorine concentration distribution where the highest concentration is localized near the surface rather than uniformly distributed. This local quality variation allows the fluorine to effectively offset boron's carrier effect at the critical interface region without causing excessive crystal defects throughout the entire doping region
2Measurement precision
If the dose of phosphorus as a counter is increased to raise the threshold voltage, then the threshold voltage increases, but more crystal defects occur leading to further increase in dark current
Solution Approach 1:
The patent changes the dopant from P/As to fluorine and adjusts the concentration profile positioning, which allows achieving the same voltage adjustment effect with fewer crystal defects. The fluorine's unique properties and optimized distribution reduce lattice damage compared to conventional counter doping
Solution Approach 2:
The patent uses fluorine doping as a replacement for conventional P/As counter doping. Although fluorine is a different element with different properties, it serves as an effective substitute that achieves the voltage adjustment function with fewer harmful side effects, essentially replacing a problematic solution with a superior one
3Measurement precision
If the resistance of substrate or design of SDD element is changed to adjust threshold voltage, then the threshold voltage can be adjusted, but other characteristics such as dark current and EDS characteristics may also change
Solution Approach 1:
The patent applies fluorine doping with a specific concentration profile localized near the pn junction interface. This localized modification allows independent adjustment of threshold voltage without significantly affecting other regions of the detector, thereby maintaining EDS characteristics while achieving voltage tuning
Solution Approach 2:
The patent segments the doping function by using fluorine specifically for threshold voltage adjustment while keeping the boron doping profile for the P-type semiconductor region formation separate. This functional segmentation allows independent optimization of voltage characteristics without compromising detection performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the adjustment of threshold voltage while suppressing dark current, resulting in improved EDS characteristics by controlling fluorine implantation dose and depth, and maintaining a shallow pn junction without increasing dark current.
Implementation Method 1
since fluorine (F) added as a counter offsets the effect of boron (B) serving as a carrier in the P-type semiconductor region, it is possible to change the position of a pn junction and inhibit the spreading of a depletion layer, thereby increasing the Vth
Implementation Method 2
Since F becomes negative charges (i.e., negatively charged) in the semiconductor substrate and behaves like n-type carriers, the Vth rises
Implementation Method 3
a P-type semiconductor region formation step in which boron is added to a surface of an n-type semiconductor substrate to form a P-type semiconductor region. The P-type semiconductor region formation step includes a fluorine addition step in which fluorine is further added to a surface of the semiconductor substrate
Data Source
Figure 1
Figure 2(a)~2(b)
Figure 3
AI summary
A semiconductor detector capable of raising an operating voltage Vth while suppressing an increase in dark current, and a method of manufacturing the semiconductor detector are proposed. The semiconductor detector includes an n-type semiconductor substrate, a detection electrode formed on a first side of the n-type semiconductor substrate and configured to collect charges generated by incidence of radiation, a plurality of drift electrodes formed to surround the detection electrode and applied with a voltage causing a potential gradient in which a potential changes toward the detection electrode so that the charges can move to the detection electrode, a radiation incidence window provided on a second surface of the n-type semiconductor substrate, a P-type semiconductor region formed by adding boron to the surface side on the second surface of the semiconductor substrate through the radiation incidence window, and a depleting electrode causing a reverse bias between the P-type semiconductor region formed on the second surface and an N-type semiconductor region formed in the n-type semiconductor substrate. F is additionally added to the P-type semiconductor region, and a region with the highest concentration of F is located deeper than a region with the highest concentration of B.