Semiconductor Device Lowering Threshold Voltage via Base Layer Impurity

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Solution Overview

Problem

Conventional Insulated Gate Bipolar Transistors (IGBTs) face challenges in lowering the threshold voltage without compromising the Reverse Bias Safe Operation Area (RBSOA) tolerance and manufacturing variation, as reducing impurity concentration or channel length leads to increased leakage current and variation.

Innovation Solution

A semiconductor device design with a carrier store layer and a base layer having a peak impurity concentration of 1.0E17 cm−3, featuring an active trench and a gate insulating film, allows for reduced threshold voltage without deteriorating RBSOA tolerance or manufacturing variation, enabling 5 V drive without a separate 15 V power source.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the impurity concentration in the base layer is lowered to reduce the threshold voltage, then the threshold voltage decreases, but the RBSOA tolerance deteriorates and pinch resistance increases

Engineering Contradiction:
Improvethreshold voltageVSAvoidRBSOA tolerance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by creating a non-uniform impurity concentration distribution in the base layer through selective ion implantation. The carrier store layer receives a different ion implantation condition than other regions, creating a localized high-concentration region that maintains RBSOA tolerance while other regions maintain low threshold voltage. This resolves the contradiction by allowing different functional requirements to be met in different locations of the same component.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The base layer is segmented into functionally distinct regions: a carrier store layer with higher impurity concentration for maintaining RBSOA tolerance, and surrounding regions with lower impurity concentration for achieving low threshold voltage. This segmentation allows each region to optimize for its specific function without compromising the other, resolving the contradiction between threshold voltage reduction and RBSOA tolerance maintenance.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If the channel length is shortened to reduce the threshold voltage, then the threshold voltage decreases, but the manufacturing variation increases

Engineering Contradiction:
Improvethreshold voltageVSAvoidmanufacturing variation
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Instead of changing the geometric parameter of channel length, the patent changes the physical parameter of impurity concentration in the base layer. By controlling the ion implantation dose and energy, the threshold voltage is adjusted without modifying the channel length dimension. This approach avoids the manufacturing variation issues associated with precise dimensional control while achieving the same effect of threshold voltage reduction.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If the drive temperature is lowered to activate the base layer faster, then the activation time decreases, but the leakage current increases

Engineering Contradiction:
Improveactivation timeVSAvoidleakage current
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The patent performs preliminary action by pre-implanting carriers into the base layer during manufacturing, creating a carrier store layer that is ready to provide carriers when needed. This eliminates the need for high-temperature drive conditions to generate carriers dynamically, reducing both activation time and leakage current. The carrier store layer is prepared in advance to fulfill the activation requirement without harmful side effects.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11393919B2Semiconductor device
Publication Date: 2022.07.19 MITSUBISHI ELECTRIC CORP
  • US11393919B2 patent drawing
  • US11393919B2 patent drawing
  • US11393919B2 patent drawing

AI summary

An object of the present disclosure is to provide a semiconductor device capable of lowering the threshold voltage without deteriorating the RBSOA tolerance and manufacturing variation. According to the present disclosure, the semiconductor device includes a drift layer of a first conductivity type, a carrier store layer of the first conductivity type, a base layer of a second conductivity type, an emitter layer of the first conductivity type provided on the first main surface side of the base layer, an active trench provided so as to extend through the emitter layer, the base layer, and the carrier store layer and reach the drift layer, a gate insulating film, a gate electrode, and a collector layer of the second conductivity type provided on a second main surface side of the drift layer, in which peak concentration of impurities in the base layer is 1.0E17 cm−3 or higher.