Semiconductor Device Dual-Surface Pad Testing

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Solution Overview

Problem

There is a need for a semiconductor device that allows for easy performance testing, as existing devices face challenges in efficiently checking the functionality and reliability of components like controllers and semiconductor memories, especially in compact form factors.

Innovation Solution

The semiconductor device incorporates a printed circuit board with distinct pads for signal transfer and testing, where the controller and semiconductor memory are integrated in a System in Package (SiP) configuration, allowing for direct electrical connections and access through test pads on the second surface for comprehensive testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a compact semiconductor device is designed with integrated controller and memory, then device size is reduced, but testing accessibility deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidtesting accessibility
Core Design Contradiction:
Volume of moving objectVSEase of operation

Solution Approach 1:

The patent introduces a dual-surface pad configuration where test pads are positioned on the second surface of the printed circuit board, opposite to the first surface containing the interface part. This spatial separation across dimensions allows test signals to access controller connections without interfering with the compact integrated design on the first surface, thereby maintaining small device volume while improving testing accessibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If separate test pads are added for component testing, then testing capability is improved, but device complexity increases

Engineering Contradiction:
Improvetesting capabilityVSAvoidpad configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the pad functions by creating distinct first pads for interface part connections and second pads for controller testing on the printed circuit board. This functional segmentation allows independent access to controller signals through the second pads via conductive vias, enabling comprehensive testing without requiring additional external test equipment or complex test structures, thus improving testing capability while managing device complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10204661B2Semiconductor device
Publication Date: 2019.02.12 KIOXIA CORP
  • US10204661B2 patent drawing
  • US10204661B2 patent drawing
  • US10204661B2 patent drawing

AI summary

A semiconductor device includes a printed circuit board having a first surface and a second surface on a side opposite to the first surface. First pads are on the first surface of the printed circuit board. An interface part is mounted on the printed circuit board via the first pads and is configured to transfer a signal between the interface part and a host device. Second pads are also on the first surface and insulated from the interface part. A semiconductor memory and a controller are mounted on the first surface. First solder balls electrically connect the first pads and the controller. Second solder balls electrical connect the second pads and the controller. A plurality of third pads are disposed on the second surface and electrically connected to the second pads allowing direct connections to the controller and memory via the second pads.