Semiconductor Device With High-Concentration P-Type Layer
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Solution Overview
Problem
In trench-gate MOSFETs, dielectric breakdown occurs due to high voltage applied to the gate insulating film in the terminal region, making it challenging for the source electrode to contact the semiconductor region, especially when the gate insulating film is made thicker to prevent breakdown, which narrows the semiconductor region between adjacent gate electrodes.
Innovation Solution
A semiconductor device design that includes a p-type high-concentration layer between the gate electrodes and the source electrode, reducing parasitic resistance and allowing for a thicker gate insulating film in the terminal region without narrowing the semiconductor region, thereby facilitating contact between the source electrode and the semiconductor region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating film is made thicker to prevent dielectric breakdown, then the reliability is improved, but the semiconductor region width between adjacent gate electrodes becomes narrower
Solution Approach 1:
The patent applies local quality by creating a high-concentration semiconductor layer specifically in the terminal region between adjacent gate electrodes, while maintaining different doping concentrations in other regions. This localized modification allows the gate insulating film to be thicker without compromising the semiconductor region width, as the high-concentration layer provides enhanced electrical properties only where needed in the terminal region.
Solution Approach 2:
The patent changes the doping concentration parameter by forming a high-concentration semiconductor layer with deliberately increased impurity concentration in the terminal region. This parameter change enables the structure to accommodate a thicker gate insulating film while maintaining adequate semiconductor region width and electrical performance through the enhanced doping profile.
2Reliability
If the gate insulating film is made thicker to prevent dielectric breakdown, then the reliability is improved, but the ease of manufacture deteriorates due to difficulty in source electrode contact
Solution Approach 1:
The high-concentration semiconductor layer is formed specifically in the terminal region where source electrode contact is required, creating a localized zone with enhanced electrical properties that facilitates easier contact formation. This local modification does not require changing the overall manufacturing process but adds a targeted step in the terminal region to improve contactability while maintaining thicker gate insulating film for reliability.
3Productivity
If the semiconductor region width is reduced, then the device density is improved, but the parasitic resistance increases
Solution Approach 1:
The patent applies local quality by forming a high-concentration semiconductor layer specifically in the terminal region between gate electrodes, creating a localized low-resistance path. This allows the semiconductor region width to be reduced for higher device density while the high-concentration layer compensates for the increased parasitic resistance by providing enhanced electrical conductivity in the contact region.
Solution Approach 2:
The high-concentration semiconductor layer acts as an intermediary between the reduced-width semiconductor region and the source electrode, providing a transition zone with enhanced electrical properties that reduces parasitic resistance while allowing the main semiconductor region to maintain narrow width for high device density.
Data Source
AI summary
A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.