Semiconductor Device Vertical Routing for RF Isolation
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Solution Overview
Problem
High integration of components in semiconductor devices for mobile communication leads to increased complexity in interconnection routing, making it difficult to improve isolation characteristics and reduce path loss between radio-frequency signals.
Innovation Solution
A semiconductor device configuration with a base, a first switching unit, and an amplifier circuit, where the first switching unit and amplifier unit are positioned to minimize interconnection lengths and prevent overlap, along with a radio-frequency circuit design that includes matching and filtering units to shorten interconnection lines and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If components are highly integrated in semiconductor devices, then miniaturization is achieved, but interconnection routing complexity increases making it difficult to improve isolation characteristics and reduce path loss
Solution Approach 1:
The patent transitions from two-dimensional planar routing to three-dimensional vertical routing by stacking switching units and amplifier units at different heights. This vertical arrangement reduces interconnection length and avoids signal path overlap, thereby improving isolation characteristics and reducing path loss while maintaining miniaturization.
Solution Approach 2:
The patent divides the semiconductor device into functionally separated units: switching units positioned at one height and amplifier units at another height. This segmentation allows independent optimization of each unit's routing paths and reduces interference between different signal paths, improving both isolation and reducing routing complexity.
2Ease of operation
If interconnection lines are lengthened to connect components, then routing flexibility increases, but path loss increases
Solution Approach 1:
By utilizing the vertical dimension to position switching and amplifier units at different heights, the patent creates direct vertical interconnections that are significantly shorter than horizontal routing paths. This three-dimensional arrangement maintains routing flexibility while dramatically reducing interconnection length and associated path loss.
3Adaptability or versatility
If interconnection lines are routed to connect switching unit and amplifier unit via other components, then connectivity is achieved, but interconnection length increases leading to greater path loss
Solution Approach 1:
The patent establishes direct vertical interconnections between switching units and amplifier units by positioning them at different heights, eliminating the need for signals to route through intermediate components. This direct three-dimensional path maintains full connectivity while minimizing interconnection length and path loss.
4Area of stationary object
If interconnection lines are routed in overlapping paths to save space, then area utilization improves, but isolation characteristics deteriorate
Solution Approach 1:
The patent resolves path overlap by routing interconnections vertically through different height levels. Transmission paths and reception paths are separated in the vertical dimension, preventing electromagnetic interference while maintaining efficient space utilization on the substrate plane.
Solution Approach 2:
By segmenting the device into vertically separated switching and amplifier units, the patent creates distinct signal path zones. This spatial segmentation prevents overlapping of transmission and reception paths, improving isolation characteristics while maintaining compact footprint.
Data Source
AI summary
A semiconductor device includes a base, a first switching unit disposed on the base, the first switching unit having a substantially rectangular shape and including plural first switches, and an amplifier unit disposed on the base, the amplifier unit including plural amplifier circuits to which a radio-frequency signal is inputted after passing through the first switching unit. In plan view of the base, the first switching unit has four edges including a first edge, a second edge orthogonal to the first edge, and a third edge parallel to the first edge and orthogonal to the second edge, the amplifier unit includes a first region extending along the first edge, a second region extending along the second region, and a third region extending along the third edge, and at least one of the plural amplifier circuits is disposed in each of the first region, the second region, and the third region.