Semiconductor Device Integrating Wide-Bandgap and Silicon Layers
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Solution Overview
Problem
Current methods for manufacturing power devices using wide-bandgap compound semiconductors are complex and limited in reducing module size, as they require separate formation of each chip, making integration with silicon devices challenging.
Innovation Solution
A semiconductor device is fabricated with a silicon substrate, a silicon oxide layer, a first silicon layer with a different orientation, and a wide-bandgap compound semiconductor layer with a hexagonal crystal structure, allowing for integration of both silicon and wide-bandgap devices on a single chip through specific layer orientations and epitaxial growth techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chips using wide-bandgap compound semiconductor are packaged into one module individually, then device performance is maintained, but formation method becomes complicated and module size cannot be reduced
Solution Approach 1:
The patent combines wide-bandgap compound semiconductor devices and silicon devices into a single integrated chip structure. The wide-bandgap device layer and silicon device layer are formed on the same semiconductor substrate, allowing both device types to coexist and function together in one chip, thereby simplifying the formation method and reducing module size while maintaining device performance.
Solution Approach 2:
The semiconductor substrate serves multiple functions by supporting both wide-bandgap compound semiconductor devices and silicon devices. This multi-functional substrate enables different device types to be integrated without requiring separate packaging processes, resolving the contradiction between maintaining performance and reducing complexity.
2Volume of stationary object
If wide-bandgap compound semiconductor devices and silicon devices are integrated on one chip, then module size is reduced, but dielectric and inductive coupling losses may occur
Solution Approach 1:
An insulating layer is introduced as an intermediary between the wide-bandgap compound semiconductor device and the silicon device. This insulating layer acts as a mediator that prevents direct electrical interaction, thereby eliminating dielectric and inductive coupling losses while allowing both devices to coexist on the same chip and reducing overall module size.
Solution Approach 2:
The chip is segmented into distinct functional regions with the wide-bandgap device layer and silicon device layer separated by the insulating layer. This segmentation prevents harmful electromagnetic coupling between different device types while maintaining the benefits of integration, thus reducing module size without incurring energy losses.
3Loss of energy
If normally-off transistor operation is implemented, then device efficiency is improved, but high-temperature processing of silicon devices is required
Solution Approach 1:
The patent applies different processing conditions to different regions of the chip. The wide-bandgap compound semiconductor device, which can withstand high temperatures, is processed at elevated temperatures to achieve normally-off operation. The silicon device region is protected or processed separately at lower temperatures. This localized quality approach allows normally-off transistor operation in the wide-bandgap device without subjecting the silicon device to damaging high-temperature processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of wide-bandgap compound semiconductor devices and silicon devices on a single chip, enhancing module size reduction, preventing dielectric and inductive coupling losses, and allowing for normally-off transistor operation without high-temperature processing of silicon devices.
Implementation Method 1
allowing for integration of both silicon and wide-bandgap devices on a single chip through specific layer orientations and epitaxial growth techniques
Data Source
AI summary
A semiconductor device includes: a silicon substrate having a first plane with a first plane orientation; a silicon oxide layer provided on a first region of the silicon substrate; a first silicon layer provided on the silicon oxide layer, the first silicon layer having a second plane with a second plane orientation different from the first plane orientation; and a wide-bandgap compound semiconductor layer having a hexagonal crystal structure.