Semiconductor Device Diagonal Pattern Arrangement

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Solution Overview

Problem

Conventional photolithography processes have limitations in reducing line and space widths of patterns in semiconductor devices, making it difficult to form fine patterns within a limited area efficiently.

Innovation Solution

A semiconductor device and manufacturing method involving specific arrangements and etching processes to form main patterns with alternating line pattern units and contact pads, allowing for efficient disposition of fine patterns and contact pads by using hard mask patterns and etching techniques to create symmetrical and diagonal arrangements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photolithography process is used to form patterns, then manufacturing process is simple, but line width and space width cannot be reduced below resolution limit

Engineering Contradiction:
Improveline widthVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The manufacturing process is segmented into multiple stages: first forming initial patterns, then forming spacers around these patterns, and finally using the spacers as new patterns. This multi-stage segmentation allows achieving fine line widths beyond photolithography resolution limits by breaking down the single-step patterning into sequential steps where each step works within achievable precision limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The spacer formation process performs preliminary action by first creating larger initial patterns that are easier to form, then using these as templates to generate the final fine patterns through spacer deposition. This preliminary structuring enables subsequent processes to achieve higher precision than would be possible directly through photolithography alone.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If more patterns are disposed within limited area, then integration density increases, but layout complexity increases

Engineering Contradiction:
Improvenumber of patternsVSAvoidlayout complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The spacer formation process serves multiple functions simultaneously: it defines new pattern boundaries, creates alignment references for subsequent steps, and generates the actual fine patterns all in one deposition process. This multi-functionality reduces the number of separate steps needed to achieve high pattern density, thereby reducing overall layout complexity despite increasing pattern quantity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The initial patterns automatically serve as templates for spacer formation, and the formed spacers automatically become the next generation of patterns. This self-service mechanism where structures create their own successors reduces the need for external intervention and complex process orchestration, enabling higher pattern density with manageable complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the efficient formation and arrangement of fine patterns and contact pads, enhancing integration density and process reliability by overcoming the resolution limits of conventional photolithography.

Implementation Method 1

etching the etched layer by performing an etching process using the first hard mask pattern as an etch mask to form a main pattern

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9087791B2Semiconductor device and method of manufacturing the same
Publication Date: 2015.07.21 SK HYNIX INC
  • US9087791B2 patent drawing
  • US9087791B2 patent drawing
  • US9087791B2 patent drawing

AI summary

A semiconductor device and a method of manufacturing the same are provided. The device includes first and second line pattern units configured to extend substantially parallel to one another in a first direction and alternately disposed such that end portions of the first and second line pattern units are arranged in a diagonal direction, third and fourth pattern units configured to respectively extend from the end portions of the first and second line pattern units in a second direction crossing the first direction, first contact pad units respectively formed in the third line pattern units disposed a first distance from the end portions of the first line pattern units, and fourth contact pad units respectively formed in the fourth line pattern units disposed a second distance from the end portions of the second line pattern units. Here, the second distance is different from the first distance.