Semiconductor Die Alignment via Single Layer Dielectric Film

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Solution Overview

Problem

Conventional fan-out wafer level packaging methods often result in displacement and rotation of semiconductor die during unit placement and encapsulation, leading to yield loss and misalignment issues due to the lack of rigid attachment to temporary tape carriers, which necessitates larger bond pads and reduces application space.

Innovation Solution

A method involving a single layer dielectric film laminated onto a temporary carrier substrate, cured to lock semiconductor die in place, and then encapsulated with a conductive layer formed over the dielectric film to prevent displacement and rotation, using techniques like laser ablation for patterning and photolithographic processes to create redistribution layer traces and via holes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor die are placed on temporary tape carriers without rigid attachment, then the placement process is simple and fast, but the die undergo displacement and rotation during unit placement and encapsulation

Engineering Contradiction:
Improveplacement speedVSAvoiddie alignment
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a rigid attachment structure between the semiconductor die and the carrier substrate before the encapsulation process. This is achieved through creating a recess in the carrier substrate that receives the die, and forming an adhesive structure that bonds the die to the carrier. This preliminary rigid attachment prevents displacement and rotation during subsequent encapsulation, resolving the contradiction between simple/fast placement and precise die alignment.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If larger bond pads are used to compensate for misalignment, then yield loss is reduced, but the application space is reduced

Engineering Contradiction:
ImproveyieldVSAvoidapplication space
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent replaces the mechanical approach of using larger bond pads to compensate for alignment issues with a chemical/adhesive-based solution. An adhesive structure is formed between the die and carrier substrate that provides precise positioning and prevents misalignment during encapsulation. This substitution allows for smaller bond pads while maintaining high yield, thereby preserving application space.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If the single layer dielectric film is cured to lock die in place, then die alignment is maintained, but the process complexity increases

Engineering Contradiction:
Improvedie alignmentVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the single layer dielectric film: it serves as both the attachment medium for the die and the encapsulant material. The dielectric film is applied to the carrier substrate, the die are placed on it, and then the film is cured to lock the die in place. This consolidation of functions maintains precise die alignment while minimizing process complexity by using a single material system for both attachment and encapsulation.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces yield loss by maintaining die alignment, allows for smaller bond pads, and improves package assembly reliability by ensuring the active surfaces of semiconductor die remain flush and securely attached, enhancing the integrity of the final packages.

Implementation Method 1

The single layer dielectric film can be cured after placing the plurality of semiconductor die on the first surface of the single layer dielectric film to lock the plurality of semiconductor die in place

Methodology Applied
Scientific EffectCuring:

Implementation Method 2

The cured single layer dielectric film can be patterned utilizing a mask-less patterning technique to form redistribution layer (RDL) trace pattern openings and to form a via hole

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS9754835B2Semiconductor device and method comprising redistribution layers
Publication Date: 2017.09.05 DECA TECH USA INC
  • US9754835B2 patent drawing
  • US9754835B2 patent drawing
  • US9754835B2 patent drawing

AI summary

A method of making a semiconductor package can include placing a single layer dielectric film on a temporary carrier substrate. A plurality of semiconductor die can be placed directly on the first surface of the single layer dielectric film. The single layer dielectric film can be cured to lock the plurality of semiconductor die in place on the single layer dielectric film. The plurality of semiconductor die can be encapsulated while directly on the single layer dielectric film with an encapsulant. The single layer dielectric film can be patterned utilizing a mask-less patterning technique to form a via hole after removing the temporary carrier substrate. A conductive layer can be formed directly on, substantially parallel to, and extending across, the second surface of the patterned single layer dielectric film, within the vial hole, and over the plurality of semiconductor die.