Multi-Gradient Semiconductor Die Edge for Stress-Reduced Sawing

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Solution Overview

Problem

The semiconductor wafer sawing process induces mechanical stresses, leading to cracking and peeling at die edges, and residual stresses due to thermal expansion and modulus differences between material layers, resulting in decreased product yield.

Innovation Solution

A method involving multiple sawing operations using dicing blades of different widths, with a die attach film (DAF) and dicing tape to manage stresses, and a supporting element to fix the substrate during sawing, reducing mechanical and residual stresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single sawing operation is performed on the semiconductor wafer, then the sawing process is completed quickly, but mechanical stresses cause cracking and peeling at die edges

Engineering Contradiction:
Improvesawing process speedVSAvoiddie edge integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The sawing process is divided into multiple sequential operations (first sawing operation, second sawing operation, third sawing operation) instead of a single operation. Each operation uses a dicing blade of progressively smaller width, allowing the wafer to be cut in stages which reduces mechanical stress concentration and prevents cracking and peeling at die edges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The width of the dicing blade is changed between sawing operations. The first sawing operation uses a first dicing blade with a first width, the second sawing operation uses a second dicing blade with a second width smaller than the first, and the third sawing operation uses a third dicing blade with a third width smaller than the second. This parameter change optimizes stress distribution during the cutting process.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple sawing operations are performed on the semiconductor wafer, then cracking and peeling are prevented, but the sawing process time increases

Engineering Contradiction:
Improvedie edge integrityVSAvoidsawing process speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

A die attach film is applied to the rear surface of the semiconductor wafer before the sawing operations begin. This preliminary action provides mechanical support and stress distribution during the multiple sawing operations, enabling the process to maintain high reliability while managing the increased process time through efficient sequential cutting.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If residual stresses from thermal expansion and modulus differences are not managed, then the manufacturing process is simple, but peeling occurs at die edges

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddie edge integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The modulus of the die attach film is specifically selected to be between 1 GPa and 1000 GPa, and its thickness is controlled between 1 μm and 50 μm. These parameter changes optimize the film's ability to manage residual stresses from thermal expansion and modulus differences between material layers, preventing peeling while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

A multi-layer structure is created consisting of the semiconductor wafer, the die attach film, and the dicing tape. This composite structure combines materials with different mechanical properties to manage and distribute stresses effectively, preventing peeling at die edges while accommodating thermal expansion and modulus differences between layers.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents cracking and peeling, enhancing the integrity and reliability of semiconductor devices by gradually reducing and balancing stresses during the sawing process, thereby improving production yield.

Implementation Method 1

A method for sawing a semiconductor wafer with a die attach film (DAF) by performing sawing operations multiple times... a supporting element to fix the substrate during sawing, reducing mechanical and residual stresses

Methodology Applied
Scientific EffectMechanical Force: Mechanical Force

Implementation Method 2

A method for sawing a semiconductor wafer with a die attach film (DAF) by performing sawing operations multiple times... to manage stresses, and a supporting element to fix the substrate during sawing, reducing mechanical and residual stresses

Methodology Applied
Scientific EffectStress Relaxation: Stress Relaxation

Data Source

PatentUS20240363398A1Semiconductor die having edge with multiple gradients
Publication Date: 2024.10.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240363398A1 patent drawing
  • US20240363398A1 patent drawing
  • US20240363398A1 patent drawing

AI summary

A semiconductor die is provided. The semiconductor die includes a substrate having a front surface, a rear surface opposite to the front surface, and a sidewall connected between the front surface and the rear surface. The sidewall includes a first primary segment immediately connected to the front surface, a second primary segment immediately connected to the rear surface, and a middle segment between the first primary segment and the second primary segment. The slope of the second primary segment is less than the slope of the first primary segment, and the slope of the middle segment is less than the slope of the second primary segment. Each of the first primary segment, the second primary segment, and the middle segment is a flat surface having a slope greater than 0 degrees relative to a line parallel to the front surface of the substrate.