Semiconductor Die Notch Configuration for Package Height Reduction
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Solution Overview
Problem
The challenge in semiconductor packaging is to reduce the final package size while maintaining the integrity and functionality of the die thickness, wire bond height, encapsulant protection, and package robustness, while also addressing heat dissipation issues, which are complicated by the need to access the die directly.
Innovation Solution
A semiconductor device with a semiconductor die featuring notches along its edges to accommodate leads, allowing for reduced package height and improved heat dissipation, where the leads are recessed within the notches and encapsulated, enabling a more compact package form factor without compromising structural integrity or manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the die thickness is reduced to decrease package height, then the package height is reduced, but the structural strength and reliability of the die are compromised
Solution Approach 1:
The lead frame is nested within the recesses of the die, with leads positioned in notches cut into the die edges. This allows the lead frame to be integrated into the die structure itself, eliminating the need for additional height to accommodate a separate lead frame assembly while maintaining structural integrity through the interlocking geometry.
Solution Approach 2:
Instead of reducing die thickness in the vertical dimension, the invention redistributes structural requirements across multiple dimensions by creating recesses and notches in the die edges. This dimensional redistribution allows the lead frame to be accommodated within the die's lateral geometry rather than requiring vertical space, thus reducing package height without compromising strength.
2Length of stationary object
If the encapsulant thickness is reduced to decrease package height, then the package height is reduced, but the protection capability for the die is compromised
Solution Approach 1:
The encapsulant is nested within the recesses of the die structure, filling the cavities formed by the notches and recesses. This allows the encapsulant to provide protection while conforming to the reduced vertical profile, as it is contained within the lateral geometry of the die rather than requiring additional vertical thickness.
3Length of stationary object
If the wire bond height is reduced to decrease package height, then the package height is reduced, but the reliability and shorting avoidance capability are compromised
Solution Approach 1:
The wire bonds are extracted from the conventional elevated position and repositioned to lie flat on the die surface within the recesses. This extraction from the vertical dimension eliminates the need for height to accommodate wire bond loops, while the wires remain functional by maintaining electrical connections within the planar geometry of the die surface.
4Strength
If the lead frame is positioned under the die to provide support, then the package robustness is improved, but the package height increases
Solution Approach 1:
The lead frame is repositioned from a vertical arrangement (under the die, adding height) to a lateral arrangement (within the die recesses). This dimensional change allows the lead frame to provide structural support and robustness while being contained within the horizontal geometry of the die, thus eliminating the height penalty.
5Temperature
If the die is directly accessed for heat dissipation, then the heat dissipation capability is improved, but the manufacturing complexity increases
Solution Approach 1:
The recesses and notches in the die serve multiple functions: they accommodate the lead frame structure, enable heat dissipation by exposing die surfaces, and facilitate encapsulant placement. This multi-functionality eliminates the need for separate manufacturing steps for each feature, as the same geometric modifications achieve multiple objectives simultaneously.
Data Source
AI summary
A semiconductor device includes a semiconductor die having a first major surface and a second major surface opposite the first major surface, a first minor surface and a second minor surface opposite the first minor surface, a plurality of contact pads on the first major surface, and a notch which extends from the first minor surface and the second major surface into the semiconductor die. The notch has a notch depth measured from the second major surface into the semiconductor die, wherein the notch depth is less than a thickness of the semiconductor die, and a notch length measured from the first minor surface into the semiconductor die, wherein the notch length is less than a length of the semiconductor die measured between the first and second minor surfaces. The device includes a lead having a first end in the notch, and an encapsulant over the first major surface.