Semiconductor Die Power Rail Pad Configuration for Noise Reduction

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Solution Overview

Problem

The increase in external connectors for semiconductor die packages to accommodate additional functionality and power supply requirements leads to increased stray capacitance and noise induction due to the high number of power rail wire bonds, which can account for up to 50% of all wire bonds, causing coupling and noise issues.

Innovation Solution

The use of larger power rail pads with surface areas greater than the die connection pads, which are non-circuit nodes, to reduce the number of power rail wire bonds by distributing the power supply across multiple die connection pads and external connectors, thereby shortening data wire bond lengths and minimizing stray capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of external connectors is increased to accommodate additional functionality and power supply requirements, then the power supply capability and functionality are improved, but the stray capacitance and noise induction increase due to the high number of power rail wire bonds

Engineering Contradiction:
Improvepower supply capabilityVSAvoidstray capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

Multiple die connection pads that would individually require separate power rail wire bonds are merged into a single large power rail pad. This consolidation maintains the power supply capability to multiple connection points while reducing the total number of wire bonds, thereby decreasing stray capacitance and noise induction.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The large power rail pad serves multiple functions simultaneously: it provides power supply to multiple die connection pads, acts as a common reference potential, and reduces the overall wire bond count. This multi-functionality allows the single pad to replace what would otherwise require multiple separate pads and wire bonds.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If the number of external connectors is increased to accommodate additional functionality and power supply requirements, then the power supply capability is improved, but the number of wire bonds increases leading to increased device complexity

Engineering Contradiction:
Improvepower supply capabilityVSAvoidnumber of wire bonds
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Multiple die connection pads are merged into a single large power rail pad, consolidating what would require multiple separate wire bonds into a single wire bond connection. This reduces the total wire bond count and simplifies the packaging structure while maintaining the ability to supply power to multiple locations.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If the number of power rail wire bonds is reduced by using larger power rail pads, then the stray capacitance is decreased, but the surface area of the die connection pad surface increases

Engineering Contradiction:
Improvestray capacitanceVSAvoidpower rail pad surface area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The die connection pad surface is differentiated into regions with different properties: large power rail pads for power supply connections and smaller data connection pads for signal connections. This local differentiation optimizes each region for its specific function, allowing large surface area for power while minimizing wire bond-related stray capacitance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8643189B1Packaged semiconductor die with power rail pads
Publication Date: 2014.02.04 CHIP PACKAGING TECH LLC
  • US8643189B1 patent drawing
  • US8643189B1 patent drawing
  • US8643189B1 patent drawing

AI summary

A packaged semiconductor die has a die support mounting surface mounted to a die support having external connectors. A die connection pad surface opposite to die supporting mount surface has associated die connection pads that are circuit nodes of the semiconductor die. The die connection pad surface also has a power rail pad. The power rail pad has a surface area larger than surface areas of the die connection pads. Bond wires electrically couple the power rail pad to two or more of the die connection pads.