Semiconductor Die Singulation via Plasma Etching and Fluid Machining
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in reducing residual contamination and backside layer removal during plasma dicing, which affects the quality and reliability of singulated die, and requires cost-effective solutions that minimize damage.
Innovation Solution
A method involving plasma etching to form narrow singulation lines, followed by pressurized fluid machining to remove residual materials and backside layers, using a combination of de-ionized water and surfactants to minimize contamination and damage, with the process optimized for efficiency and throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If plasma dicing is used to singulate die, then throughput and scribe line width are improved, but residual contamination and backside layer removal challenges worsen
Solution Approach 1:
The patent segments the plasma dicing process into multiple distinct stages: a first plasma etch process for initial singulation, followed by a second plasma etch process for backside layer removal, and finally a separate contamination removal process. This segmentation allows each process to be optimized independently, resolving the contradiction between throughput and die quality by ensuring that contamination issues are addressed in a dedicated final stage without compromising the efficiency of the main dicing operation.
2Length of moving object
If plasma dicing is used to singulate die, then scribe line width is reduced, but backside layer removal effectiveness worsens
Solution Approach 1:
The patent applies preliminary action by performing the first plasma etch process to create narrow singulation lines before attempting backside layer removal. The process is designed so that the initial etching establishes the singulation structure, and then subsequent processes (second plasma etch and contamination removal) are applied to complete the backside layer removal without compromising the already-formed narrow scribe lines. This sequential approach allows narrow scribe lines to be achieved while still enabling effective backside layer removal through targeted subsequent processing.
3Manufacturing precision
If conventional scribing is used to singulate die, then alignment and width control are improved, but manufacturing time and throughput worsen
Solution Approach 1:
The patent replaces the mechanical scribing process with plasma-based etching processes. Instead of using a mechanical diamond wheel to physically cut through the wafer (which requires wide scribe lines for alignment and tool stability), the invention uses plasma chemistry to etch the singulation lines. This substitution enables much narrower scribe lines to be achieved while maintaining precise alignment through plasma process control, thereby dramatically increasing throughput without sacrificing alignment precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces residual contamination and backside layer presence, enhancing the quality and reliability of singulated die while maintaining cost-effectiveness and minimizing damage, thereby improving manufacturing efficiency.
Implementation Method 1
plasma dicing has had manufacturing implementation challenges
Implementation Method 2
the etch process has been unable to effectively remove the backside layers from the singulation lines
Implementation Method 3
followed by pressurized fluid machining to remove residual materials and backside layers
Implementation Method 4
using a combination of de-ionized water and surfactants to minimize contamination and damage
Data Source
AI summary
In one embodiment, semiconductor die are singulated from a semiconductor wafer by placing the semiconductor wafer onto a carrier tape, forming singulation lines through the semiconductor wafer, and reducing the presence of residual contaminates on the semiconductor wafer.