Power Semiconductor Die Layout for Thermal Strain Relief
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Solution Overview
Problem
Power semiconductor devices experience significant strain due to large temperature swings, leading to cracking, delamination, and failure, necessitating a reduction in strain to enhance reliability.
Innovation Solution
Incorporating a runner electrode with strain relief regions, segmented runner vias, and non-parallel metal runner paths to distribute current effectively and reduce strain, thereby improving the device's reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous runner electrode is provided along the perimeter of the active region, then electrical connectivity is improved, but strain accumulation increases leading to cracking and delamination
Solution Approach 1:
The runner electrode is divided into multiple segments separated by strain relief regions, where the electrically conductive material is not provided. This segmentation allows the electrode to accommodate thermal expansion and contraction during temperature cycling, reducing strain accumulation while maintaining electrical connectivity through the segmented structure.
2Ease of manufacture
If the runner via path is made parallel to the runner electrode path, then manufacturing is simplified, but strain concentration increases at intersection points
Solution Approach 1:
The runner via path is intentionally designed to be non-parallel to the runner electrode path, creating an asymmetric layout. This asymmetric arrangement distributes strain more evenly across the structure and avoids concentration at regular intersection points, while still maintaining manufacturability through defined geometric relationships.
3Manufacturing precision
If the inner edge and outer edge of the runner electrode are made parallel to the path, then manufacturing precision is improved, but strain distribution becomes uneven
Solution Approach 1:
The inner edge and outer edge of the runner electrode are designed with different orientations relative to the path. The inner edge is not parallel to the path, creating a localized geometric feature that promotes more uniform strain distribution across the electrode width, while the outer edge maintains appropriate alignment for manufacturing.
Data Source
AI summary
Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.