3D Semiconductor Structure with Dielectric Isolation

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving high element density and small size while maintaining stability and preventing short circuits due to bending and collapsing of conductive layers in three-dimensional structures.

Innovation Solution

A semiconductor structure is developed with a conductive layer, dielectric layer, and conductive architecture, where the dielectric layer separates the conductive layers and architecture, and insulating plugs are formed to support the conductive strips, preventing short circuits and reducing bending issues through a manufacturing method involving alternating layers and controlled etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-dimensional stacked memory structure is adopted to increase storage capacity, then element density is improved, but conductive layers may bend and collapse causing short circuits

Engineering Contradiction:
Improveelement densityVSAvoidstructural stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A dielectric layer is introduced as an intermediary between the conductive layer and the conductive architecture. This dielectric layer prevents direct contact and potential short circuits while maintaining the three-dimensional stacked structure for high element density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure is segmented into distinct functional layers: conductive layer, dielectric layer, and conductive architecture. This segmentation allows each layer to perform its specific function independently, with the dielectric layer providing electrical isolation to prevent short circuits in the high-density stacked configuration.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If conductive layers are placed in close proximity to increase density, then storage capacity is improved, but coupling interference between bit lines increases

Engineering Contradiction:
Improvestorage capacityVSAvoidcoupling interference
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The dielectric layer serves as an intermediary that electrically isolates adjacent conductive layers and architectures, preventing unwanted coupling interference between bit lines while allowing the layers to remain in close proximity for high storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9252231B2Semiconductor structure and manufacturing method for the same
Publication Date: 2016.02.02 MACRONIX INTERNATIONAL CO LTD
  • US9252231B2 patent drawing
  • US9252231B2 patent drawing
  • US9252231B2 patent drawing

AI summary

A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a conductive layer, a conductive architecture and a dielectric layer. The conductive layer defines adjacent first openings. The conductive architecture surrounds a portion of the conductive layer between the first openings. The dielectric layer separates the conductive layer and the conductive architecture.